- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄372114 > SAA7146A (NXP Semiconductors N.V.) Multimedia bridge, high performance Scaler and PCI circuit SPCI PDF資料下載
參數(shù)資料
| 型號(hào)： | SAA7146A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Multimedia bridge, high performance Scaler and PCI circuit SPCI |
| 中文描述： | 多媒體橋梁，高性能潔牙機(jī)和PCI電路SPCI |
| 文件頁(yè)數(shù)： | 111/144頁(yè) |
| 文件大?。?/td> | 645K |
| 代理商： | SAA7146A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)當(dāng)前第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)
1998 Apr 09
111
Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
7.16
Audio interface
7.16.1
G
ENERAL DESCRIPTION
The SAA7146A has two independent audio interface
circuits (A1 and A2) for serial input and output of digital
audio data streams. The audio interface circuits are based
on the I
2
S-bus standard but can be configured to several
data and timing formats (with respect to framing, bit clock
and synchronisation). LSB first (Sony) formats are not
supported. Up to 5 audio devices with separate serial data
lines and dedicated word select lines can be connected
directly. The interface also supports devices that share
one serial data line for multiple devices to transmit data in
different time slots. A time slot consists of one (serial) byte.
Each interface circuit supports up to 5 serial data lines and
related framing signals. A1 and A2 have the same internal
structure. They share the audio interface pins, i.e. the pins
can be accessed and utilized by one or the other audio
interface circuits at a time.
In order to support systems with asynchronous or mixed
audio sampling rates (e.g. 48 and 44.1 kHz raster, or
48 kHz 2
×
16-bit stereo and 8 kHz 8-bit mono), the two
audio interface circuits can run independently and even
asynchronously regarding bit clock rate, sampling rate and
framing (word select) signals. The two circuits can also be
combined into one synchronous interface sharing bit clock
and framing and sampling frequencies. Each audio
interface has two FIFOs (one for input and one for output),
and two associated DMA control circuits (one for master
read and one for master write), to exchange data with any
PCI address, e.g. main memory. The data structure and
signal flow control is time slot oriented and also supports
local feedback from input to output and from one timeslot
to another time slot. A set of time slots can be looped into
one ‘a(chǎn)udio super frame’ containing up to 256 bits (32 time
slots). The signal flow is defined per time slot and
programmed by a time slot list.
7.16.2
B
ASICS OF
I
2
S-
BUS SPECIFICATION
The I
2
S-bus transports digital audio (sound) signals
serially between ICs and consists of three signals:
A continuous bit clock BCLK (or SCK) with
(n
×
8) multiple of the audio sample frequency
A serial data wire SD, transporting the data in serial
bursts with MSB first
A framing signal WS (Word Select) defining
(synchronizing) the start of a serial data burst.
WS and BCLK signals are provided by the master device.
The SAA7146A audio interfaces can be configured as
master or slave.
A data receiver must latch the data on SD line with the
rising edge of the bit clock BCLK. To satisfy the
requirements regarding set-up and hold times more easily
(and secure) it is recommended that the transmitter sends
its data on the falling edge. Set-up and hold times are
specified ‘parameterized’; i.e. as a percentage of the
actual bit clock. The serial data starts one clock cycle after
an edge of WS or synchronous to the edge. The word
(burst) length of transmitter and receiver may be different.
Missing LSBs are filled with zeros, excess LSBs are
truncated. There are other formats for transmitting serial
digital audio data between ICs which are slightly different
but still very similar to the I
2
S. The data set-up and hold
times or even the definition of an active clock edge may
vary. The word select or framing signal can be ‘in sync’
with the MSB of the data burst instead of one clock cycle
ahead. The Sony format is quite different, as it starts with
LSB first.
Fig.38 General application schematic of the audio interface.
handbook, full pagewidth
MGG275
MASTER
WS
BCLK
SD IN/OUT
ACLK
(reference clock)
SLAVE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7151 | Digital multistandard colour decoder with SCART interface DMSD2-SCART |
| SAA7151B | Digital multistandard colour decoder with SCART interface DMSD2-SCART |
| SAA7157 | Clock signal generator circuit for digital TV systems SCGC |
| SAA7157T | Clock signal generator circuit for digital TV systems SCGC |
| SAA7158 | Back END IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7146AH | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Multimedia bridge, high performance Scaler and PCI circuit SPCI |
| SAA7146AH/V3,557 | 制造商:NXP Semiconductors 功能描述: |
| SAA7146AH/V4,557 | 功能描述:視頻 IC VIDEO PCI BRIDGE (QFP160) RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7146AH-V4.557 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Multimedia bridge, high performance Scaler and PCI circuit |
| SAA7146AHZ | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Multimedia bridge, high performance Scaler and PCI circuit SPCI |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。