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參數(shù)資料
| 型號： | SAA7146A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Multimedia bridge, high performance Scaler and PCI circuit SPCI |
| 中文描述： | 多媒體橋梁，高性能潔牙機和PCI電路SPCI |
| 文件頁數(shù)： | 48/144頁 |
| 文件大?。?/td> | 645K |
| 代理商： | SAA7146A |
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1998 Apr 09
48
Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
114
RPS_RE0
26
R
RPS Task 0 Register access Error
: this bit is set when the LDREG,
STREG or MASKWRITE command tries to access a non-existing
register. This bit is reset by writing a logic 1 to the RPS_E0 bit in the ISR
or when a new RPS Task 0 is started.
RPS Task 0 Page Error
: this bit is set when the RPS Task 0 tries to
write-access an address outside the 4-kbyte page. This bit is reset by
writing a logic 1 to the RPS_E0 bit in the ISR or when a new RPS Task 0
is started.
RPS Task 0 Active
: this bit is set whenever RPS Task 0 is executing
and not staying in a wait condition or uploading the working registers
DEBI Time Out
: this bit is set when the TIMEOUT value was reached.
This bit is reset by writing a logic 1 to the DEBI_E bit in the ISR. Reset
value is a logic 1.
DEBI Format Error
: this bit indicates an illegal command to immediate
transfer across a Dword boundary. This bit is reset by writing a logic 1 to
the DEBI_E bit in the ISR.
I
2
C-bus Address Error
: this bit is set when there is no acknowledge
after the device address. This bit is reset by writing a logic 1 to the IIC_E
bit in the ISR or when a new I
2
C-bus command starts.
I
2
C-bus Write data Error
: this bit is set when there is no acknowledge
during the writing of the data byte(s). This bit is reset by writing a logic 1
to the IIC_E bit in the ISR or when a new I
2
C-bus command starts.
I
2
C-bus Read data Error
This bit is set when there is no acknowledge
during reading of the data byte(s). This bit is reset by writing a logic 1 to
the IIC_E bit in the ISR or when a new I
2
C-bus command starts.
I
2
C-bus Loss arbitration Error
: this bit is set when the I
2
C-bus loses its
arbitration. This bit is reset by writing a logic 1 to the IIC_E bit in the ISR
or when a new I
2
C-bus command starts.
I
2
C-bus Frame Error
: this bit is set when there is an invalid
START/STOP condition since the last I
2
C-bus command. This bit is
reset by writing a logic 1 to the IIC_E bit in the ISR or when a new
I
2
C-bus command starts.
Video DMA 3 Protection error
: this bit is set when video DMA3
generates an address during an active transmission beyond its
protection address. This bit is reset by writing a logic 1 to the V_PE bit in
the ISR or by reloading the DMA base address.
Video DMA 2 Protection error
: this bit is set when video DMA2
generates an address during an active transmission beyond its
protection address. This bit is reset by writing a logic 1 to the V_PE bit in
the ISR or by reloading the DMA base address.
Video DMA 1 Protection error
: this bit is set when video DMA1
generates an address during an active transmission beyond its
protection address. This bit is reset by writing a logic 1 to the V_PE bit in
the ISR or by reloading the DMA base address.
Video FIFO 3 underflow/overflow
: this bit is set when the video FIFO 3
has an overflow/underflow. This bit is reset when reloading the DMA
base address or by writing a logic 1 to the VFOU bit in the ISR.
RPS_PE0
25
R
RPS_A0
24
R
DEBI_TO
23
R
DEBI_EF
22
R
IIC_EA
21
R
IIC_EW
20
R
IIC_ER
19
R
IIC_EL
18
R
IIC_EF
17
R
V3P
16
R
V2P
15
R
V1P
14
R
VF3
13
R
OFFSET
(HEX)
NAME
BIT
TYPE
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7151 | Digital multistandard colour decoder with SCART interface DMSD2-SCART |
| SAA7151B | Digital multistandard colour decoder with SCART interface DMSD2-SCART |
| SAA7157 | Clock signal generator circuit for digital TV systems SCGC |
| SAA7157T | Clock signal generator circuit for digital TV systems SCGC |
| SAA7158 | Back END IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7146AH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multimedia bridge, high performance Scaler and PCI circuit SPCI |
| SAA7146AH/V3,557 | 制造商:NXP Semiconductors 功能描述: |
| SAA7146AH/V4,557 | 功能描述:視頻 IC VIDEO PCI BRIDGE (QFP160) RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7146AH-V4.557 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multimedia bridge, high performance Scaler and PCI circuit |
| SAA7146AHZ | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multimedia bridge, high performance Scaler and PCI circuit SPCI |
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