參數(shù)資料
型號： S71PL191HB0BFI100
廠商： SPANSION LLC
元件分類： 存儲器
英文描述： SPECIALTY MEMORY CIRCUIT, PBGA73
封裝： 9 X 13 MM, LEAD FREE, FBGA-73
文件頁數(shù)： 74/172頁
文件大?。?/td> 4662K
代理商： S71PL191HB0BFI100
March 10, 2004 S71PL191_193Hx0_00A1
64 Mb pSRAM (Supplier 1)
71
Ad va nc e
Inform ati o n
Notes:
1. IDDO depends on the cycle time.
2. IDDO depends on output loading. Specified values are defined with the output open condition.
AC Characteristics
Table 11. DC Characteristics (TA = -25°C to 85°C, VDD = 2.6 to 3.3V)
Symbol
Parameter
Test Condition
Min
Typ.
Max
Unit
IIL
Input Leakage Current
VIN = 0 V to VDD
-1.0
-
+1.0
A
ILO
Output Leakage Current
Output disable, VOUT = 0 V to VDD
-1.0
-
+1.0
A
VOH
Output High Voltage
IOH = - 0.5 mA
2.4
-
V
VOL
Output Low Voltage
IOL = 1.0 mA
-
0.4
V
IDDO1
Operating Current
CE1# = VIL
CE2 = VIH, IOUT = 0 mA
tRC = min
-
50
mA
IDDO2
Page Access Operating Current
CE1# = VIL, CE2 = VIH,
Page add. cycling, IOUT = 0 mA
tPC = min
-
25
mA
IDDS
Standby Current (MOS)
CE1# = VDD - 0.2 V, CE2 = VDD - 0.2 V
-
100
A
IDDSD
Deep Power-down Standby Current
CE2 = 0.2 V
-
5
A
Table 12. Capacitance (TA = 25°C, f = 1 MHz)
Symbol
Parameter
Test Condition
Max
Unit
CIN
Input Capacitance
VIN = GND
10
pF
COUT
Output Capacitance
VOUT = GND
10
pF
Table 13. AC Characteristics and Operating Conditions (TA = -25°C to 85°C, VDD = 2.6 to 3.3V)
Symbol
Parameter
Min
Max
Unit
tRC
Read Cycle Time
70
10000
ns
tACC
Address Access Time
–
70
ns
tCO
Chip Enable (CE1#) Access Time
–
70
ns
tOE
Output Enable Access Time
–
25
ns
tBA
Data Byte Control Access Time
–
25
ns
tCOE
Chip Enable Low to Output Active
10
–
ns
tOEE
Output Enable Low to Output Active
0
–
ns
tBE
Data Byte Control Low to Output Active
0
–
ns
tOD
Chip Enable High to Output High-Z
–
20
ns
tODO
Output Enable High to Output High-Z
–
20
ns
tBD
Data Byte Control High to Output High-Z
–
20
ns
tOH
Output Data Hold Time
10
–
ns
tPM
Page Mode Time
70
10000
ns
tPC
Page Mode Cycle Time
30
–
ns
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