參數(shù)資料
型號(hào)： PPC405EZ-CSAfffTx
廠商： Applied Micro Circuits Corp.
英文描述： PowerPC 405EZ Embedded Processor
中文描述： 嵌入式處理器的PowerPC 405EZ
文件頁(yè)數(shù)： 37/54頁(yè)
文件大?。?/td> 362K
代理商： PPC405EZ-CSAFFFTX
PPC405EZ – PowerPC 405EZ Embedded Processor
Revision 1.27 - August 22, 2007
AMCC Proprietary
37
Preliminary Data Sheet
Analog to Digital (ADC) Interface
ADC_In0:7
Analog inputs.
Analog inputs to the ADC should be referenced to ADC_AGND and
should not exceed the value of VRef.
I
Analog Wide-
Wire receiver
ADC_InTrig
Input trigger.
I
3.3V LVTTL
ADC_VRef
Analog input reference voltage.
Allowable voltage range is 2V–ADC_AV
DD
.
I
Analog Wide-
Wire receiver
Digital to Analog (DAC) Interface
DAC_CRef
Reference voltage for the gate of the DAC current sources. This
voltage should be connected to the DAC_AV
DD
voltage with a 1nF
filter capacitor at the signal pin.
I
Analog Wide-
Wire driver
DAC_IOutP
Analog positive output current.
O
Analog Wide-
Wire driver
DAC_IPTrig
Input trigger.
I
3.3V LVTTL
DAC_IRRef
Analog input reference current.
I
Analog Wide-
Wire driver
DAC_VRef
Analog band gap voltage reference input.
Allowable voltage range is 1.15V–1.26V, with a typical value of
1.174V.
I
Analog Wide-
Wire driver
DAC_GRef
Reference voltage for the gate of the cascode device in the DAC
current sources. This voltage should be connected to the DAC_AV
DD
voltage with a 1nF filter capacitor at the signal pin.
I
Analog Wide-
Wire driver
Controller Area Network Interface
CAN0_Rx
Receive input.
I
3.3V LVTTL
Rcvr w/pull-up
5
CAN0_Tx
Transmit output.
O
3.3V LVTTL
CAN0_TxE
Transmit enable.
O
3.3V LVTTL
CAN1_Rx
Receive input.
I
3.3V LVTTL
5
CAN1_Tx
Transmit output.
O
3.3V LVTTL
CAN1_TxE
Transmit enable.
O
3.3V LVTTL
Table 6. Signal Functional Description (Sheet 3 of 6)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 34 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 34 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
Signal Name
Description
I/O
Type
Notes
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