
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
8
17.5
17.6
17.7
17.8
17.9
17.10
Using the SONET/SDH Alarm Controller Block ......................................................496
17.11
System Add bus “AFP” Synchronization.................................................................502
17.12
HPT Mode Considerations......................................................................................503
17.13
SVCA Reconfiguration Considerations ...................................................................504
17.14
JTAG Support..........................................................................................................504
17.15
Board Design Recommendations ...........................................................................508
18
Functional Timing................................................................................................................ 511
18.1
Line Interface Functional Timing............................................................................. 511
18.2
System Add Interface..............................................................................................512
18.3
System Drop Interface Timing.................................................................................513
18.4
System ACMP/DCMP Timing..................................................................................514
18.5
Receive Transport Overhead Port Timing (RTOH) .................................................514
18.6
Transmit Transport Overhead Port Timing (TTOH).................................................515
18.7
Receive DCC Port Timing (RDCC) .........................................................................516
18.8
Transmit DCC Port Timing (TDCC).........................................................................517
18.9
B3E Port Functional Timing.....................................................................................518
18.10
Receive Ring Control Port Timing (RRCP) .............................................................519
18.11
Transmit Ring Control Port Timing (TRCP).............................................................520
18.12
Add bus Transmit AIS Timing..................................................................................520
19
Absolute Maximum Ratings................................................................................................522
20
D.C. Characteristics............................................................................................................523
21
Power Information...............................................................................................................525
21.1
Power Requirements...............................................................................................525
22
Microprocessor Interface Timing Characteristics................................................................527
23
A.C. Timing Characteristics.................................................................................................530
23.1
Reset Timing ...........................................................................................................530
23.2
Line Interface Timing...............................................................................................530
23.3
System (777 MHz) Interface Timing........................................................................531
23.4
System Interface Control Pin Timing.......................................................................532
23.5
Receive Transport Overhead Port and B3E Timing................................................533
Accessing Indirect Registers...................................................................................490
Using the Performance Monitoring Features ..........................................................491
Using The Section/Line Bit Error Rate Monitoring Features...................................491
Using The Receive Trail trace Processor Features ................................................493
Using the Transmit Trail trace Processor................................................................495