
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
117
In quad STS-48/STM-16 mode, the line side interface supports four independent 777.6 MHz 4-
bit 8B/10B encoded serial TelecomBus interfaces. The four TelecomBus interfaces run on the
same system clock. Each serial line carries an STS-12/STM-4 data stream. For an STS-48/48c
(STM-16/AU4-16c) receive stream, the four independent STS-48/48c (STM-16/AU4-16c) #1 -
#4 are provided at the DD1[3:0], DD2[3:0], DD3[3:0] and DD4[3:0] serial TelecomBus Drop
buses, respectively. For an STS-48/48c (STM-16/AU4-16c) transmit stream, the four
independent STS-48/48c (STM-16/AU4-16c) #1 - #4 are accepted at the AD1[3:0], AD2[3:0],
AD3[3:0] and AD4[3:0] serial TelecomBus Add buses, respectively. For an STS-48/STM-16,
each DDN[M] carries an STS-12/STM-4. Also, as per SONET/SDH the different STS-12/STM-
4 constituents of an STS-48/STM-16 are four bytes interleaved as shown in Figure 18
Figure 17 Add/Drop Interface Byte Mapping in STS-192/STM-64 Mode
Figure 18 Add/Drop Interface Byte Mapping in Quad STS-48/STM-16 Mode
A1 #1
A1 #2
A1 #3
A1 #4
...
...
...
A1
#189
A1
#190
A1
#191
A1
#192
A1 #1
A1
A1 #2
A1 #3
A1 #4
A1 #5
A1 #6
A1 #7
A1 #8
A1 #9
A1 #10
A1 #11
A1 #12
A1 #13
A1 #14
A1 #15
A1 #16
AD1_1[7:0]/DD1_1[7:0]
A1 #66
A1 #65
A1 #68
A1 #67
A1 #77
A1
#129
A1
#141
Order of reception/transmission
STS-192c/AU-4-64c
Order of reception/ transmission
AD1_2[7:0]/DD1_2[7:0]
AD1_3[7:0]/DD1_3[7:0]
AD1_4[7:0]/DD1_4[7:0]
A...
AD2_1[7:0]/DD2_1[7:0]
AD2_2[7:0]/DD2_2[7:0]
AD2_3[7:0]/DD2_3[7:0]
AD2_4[7:0]/DD2_4[7:0]
A1
A1 #18
A1 #17
A1 #25
A1 #24
A1 #20
A1 #19
A1 #21
A1 #22
A1 #23
A1 #27
A1 #29
A1 #31
A1 #26
A1 #28
A1 #30
A1 #32
A1 #33
A1 #35
A1 #37
A1 #39
A1 #34
A1 #36
A1 #38
A1 #40
A1 #41
A1 #42
A1 #43
A1 #44
A1 #45
A1 #47
A1 #48
A1 #46
AD3_1[7:0]/DD3_1[7:0]
AD3_2[7:0]/DD3_2[7:0]
AD3_3[7:0]/DD3_3[7:0]
AD3_4[7:0]/DD3_4[7:0]
A1 #49
A1 #51
A1 #53
A1 #50
A1 #52
A1 #61
A1 #64
AD4_1[7:0]/DD4_1[7:0]
AD4_2[7:0]/DD4_2[7:0]
AD4_3[7:0]/DD4_3[7:0]
AD4_4[7:0]/DD4_4[7:0]
A1 #57
A1
A1 #81
A1 #93
A1
#145
A1
#157
A1
A1 #97
A1
#109
A1 #61
A1
#173
A1
A1
#113
A1
#125
A1
#177
A1
#189
A1
#128
A1
#116
A1
#192