
PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet
Release
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2000741, Issue 5
532
Symbol
Description
Min
Typical
Max
Units
FSYSCLK
SYSCLK Frequency
(nominally 77.76 MHz )
77
78
MHz
THISYSCLK
SYSCLK High Pulse
Width
5.8
ns
TLOSYSCLK
SYSCLK Low Pulse
Width
5.8
ns
Tfall
VODM fall time, 80%-
20%, (RLOAD=
100 ±1%
200
300
400
ps
Trise
VODM rise time, 80%-
20%, (RLOAD=
100 ±1%
200
300
400
ps
Tskew
Differential skew
50
ps
The min and max fADLVDS specification is to accommodate transients between generated
clocks. The mean data rate on the add and drop interfaces must be exactly 10f
SYSCLK
. FIFO
overrun/underrun in the R8TD and T8TE will result if the mean data rate differs from 10f
SYSCLK
.
A common system clock needs to be used for all devices with serial TelecomBus interfaces.
PMC-Sierra’s LVDS I/Os operate according to IEEE 1596.3-1996. The transmitter drives a
differential signal through a pair of 50 characteristic interconnects, such as board traces,
backplane traces, or short lengths of cable. The receiver presents a 100 differential
termination impedance to terminate the lines. Included in the standard is sufficient common-
mode range for the receiver to accommodate as much as 925 mV of common-mode ground
difference.
23.4 System Interface Control Pin Timing
Table 32 System Interface Control Pin Timing
Symbol
Description
Min
Max
Units
FSYSCLK
SYSCLK Frequency (nominally 77.76 MHz )
77
78
MHz
THISYSCLK
SYSCLK High Pulse Width
5.8
ns
TLOSYSCLK
SYSCLK Low Pulse Width
5.8
ns
TSCMP
DCMP/ACMP Set-Up Time
3
ns
THCMP
DCMP/ACMP Hold Time
0
ns
TSfp
DFP/AFP Set-Up Time
3
ns
THfp
DFP/AFP Hold Time
0
ns
TSAIS
TPAISFP/TPAIS Set-Up Time
3
ns