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參數(shù)資料
| 型號： | PI7C7300 |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 3-PORT PCI-to-PCI BRIDGE |
| 中文描述： | 3端口PCI至PCI橋 |
| 文件頁數(shù)： | 7/109頁 |
| 文件大?。?/td> | 779K |
| 代理商： | PI7C7300 |
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PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 7 OF 109
09/25/03 Revision 1.09
13
SUPPORTED COMMANDS ........................................................................................................ 69
13.1
PRIMARY
INTERFACE............................................................................................................. 69
13.2
SECONDARY
INTERFACE....................................................................................................... 70
14
CONFIGURATION REGISTERS ............................................................................................... 70
14.1
CONFIGURATION
REGISTER
1
AND
2 .................................................................................. 72
14.1.1
VENDOR ID REGISTER – OFFSET 00h............................................................................. 72
14.1.2
DEVICE ID REGISTER – OFFSET 00h.............................................................................. 73
14.1.3
COMMAND REGISTER – OFFSET 04h ............................................................................. 73
14.1.4
STATUS REGISTER – OFFSET 04h.................................................................................... 74
14.1.5
REVISION ID REGISTER – OFFSET 08h........................................................................... 75
14.1.6
CLASS CODE REGISTER – OFFEST 08h .......................................................................... 75
14.1.7
CACHE LINE SIZE REGISTER – OFFSET 0Ch................................................................. 75
14.1.8
PRIMARY LATENCY TIMER REGISTER – OFFSET 0Ch.................................................. 75
14.1.9
HEADER TYPE REGISTER – OFFSET 0Ch....................................................................... 76
14.1.10
PRIMARY BUS NUMBER REGISTER – OFFSET 18h ................................................... 76
14.1.11
SECONDARY (S1 or S2) BUS NUMBER REGISTER – OFFSET 18h ............................ 76
14.1.12
SUBORDINATE (S1 or S2) BUS NUMBER REGISTER – OFFSET 18h ........................ 76
14.1.13
SECONDARY LATENCY TIMER REGISTER – OFFSET 18h ........................................ 76
14.1.14
I/O BASE REGISTER – OFFSET 1Ch............................................................................. 77
14.1.15
I/O LIMIT REGISTER – OFFSET 1Ch............................................................................ 77
14.1.16
SECONDARY STATUS REGISTER – OFFSET 1Ch........................................................ 77
14.1.17
MEMORY BASE REGISTER – OFFSET 20h................................................................... 78
14.1.18
MEMORY LIMIT REGISTER – OFFSET 20h.................................................................. 78
14.1.19
PREFETCHABLE MEMORY BASE REGISTER – OFFSET 24h.................................... 78
14.1.20
PREFETCHABLE MEMORY LIMIT REGISTER – OFFSET 24h................................... 79
14.1.21
PREFETCHABLE MEMORY BASE ADDRESS UPPER 32-BITS REGISTER – OFFSET
28h
.......................................................................................................................................... 79
14.1.22
PREFETCHABLE MEMORY LIMIT ADDRESS UPPER 32-BITS REGISTER – OFFSET
2Ch
.......................................................................................................................................... 79
14.1.23
I/O BASE ADDRESS UPPER 16-BITS REGISTER – Offset 30h..................................... 79
14.1.24
I/O LIMIT ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h............................... 80
14.1.25
ECP POINTER REGISTER – OFFSET 34h..................................................................... 80
14.1.26
BRIDGE CONTROL REGISTER – OFFSET 3Ch............................................................ 80
14.1.27
DIAGNOSTIC / CHIP CONTROL REGISTER – OFFSET 40h....................................... 81
14.1.28
ARBITER CONTROL REGISTER – OFFSET 40h........................................................... 83
14.1.29
UPSTREAM MEMORY CONTROL REGISTER – OFFSET 48h..................................... 83
14.1.30
HOT SWAP SWITCH TIME SLOT REGISTER – OFFSET 4Ch...................................... 83
14.1.31
UPSTREAM (S1 or S2 to P) MEMORY BASE REGISTER – OFFSET 50h..................... 84
14.1.32
UPSTREAM (S1 or S2 to P) MEMORY LIMIT REGISTER – OFFSET 50h.................... 84
14.1.33
UPSTREAM (S1 or S2 to P) MEMORY BASE UPPER 32-BITS REGISTER – OFFSET
54h
.......................................................................................................................................... 84
14.1.34
UPSTREAM (S1 or S2 to P) MEMORY LIMIT UPPER 32 BITS REGISTER – OFFSET
58h
.......................................................................................................................................... 85
14.1.35
P_SERR# EVENT DISABLE REGISTER – OFFSET 64h................................................ 85
14.1.36
SECONDARY CLOCK CONTROL REGISTER – OFFSET 68h...................................... 86
14.1.37
PORT OPTION REGISTER – OFFSET 74h.................................................................... 86
14.1.38
MASTER TIMEOUT COUNTER REGISTER – OFFSET 74h ......................................... 88
14.1.39
RETRY COUNTER REGISTER – OFFSET 78h............................................................... 88
14.1.40
SAMPLING TIMER REGISTER – OFFSET 7Ch............................................................. 88
14.1.41
SECONDARY SUCCESSFUL I/O READ COUNTER REGISTER – OFFSET 80h......... 88
14.1.42
SECONDARY SUCCESSFUL I/O WRITE COUNTER REGISTER – OFFSET 84h........ 89
14.1.43
SECONDARY SUCCESSFUL MEMORY READ COUNTER REGISTER – Offset 88h.. 89
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PDF描述 |
|---|---|
| PI7C7300A | 3-PORT PCI-to-PCI BRIDGE |
| PI7C7300ANA | 3-PORT PCI-to-PCI BRIDGE |
| PI7C8140A | 2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
| PI7C8148B | 2-PORT PCI-to-PCI BRIDGE PLX PC16152 COMPARISON |
| PI7C8150B-33 | PCI Bridge | Asynchronous 2-Port PCI Bridge |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C7300A | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:3-PORT PCI-to-PCI BRIDGE |
| PI7C7300AEVB-3 | 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| PI7C7300ANA | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA |
| PI7C7300ANAE | 功能描述:外圍驅(qū)動器與原件 - PCI 3 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C7300ANA-E | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA |
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