參數(shù)資料
型號(hào)： PI7C7300
廠商： Pericom Semiconductor Corp.
英文描述： 3-PORT PCI-to-PCI BRIDGE
中文描述： 3端口PCI至PCI橋
文件頁(yè)數(shù)： 34/109頁(yè)
文件大?。?/td> 779K
代理商： PI7C7300
PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 34 OF 109
09/25/03 Revision 1.09
!
!
The register number in address bits AD[7:2] is equal to 000000b.
The bus number is equal to the value in the secondary bus number register in
configuration space for downstream forwarding or equal to the value in the primary
bus number register in configuration space for upstream forwarding.
!
When PI7C7300A initiates the transaction on the target interface, the bus command is
changed from configuration write to special cycle. The address and data are for-warded
unchanged. Devices that use special cycles ignore the address and decode only the bus
command. The data phase contains the special cycle message. The transaction is
forwarded as a delayed transaction, but in this case the target response is not forwarded
back (because special cycles result in a master abort). Once the transaction is completed
on the target bus, through detection of the master abort condition, PI7C7300A responds
with TRDY# to the next attempt of the con-figuration transaction from the initiator. If
more than one data transfer is requested, PI7C7300A responds with a target disconnect
operation during the first data phase.
The bus command on CBE# is a configuration write command.
4.9
TRANSACTION TERMINATION
This section describes how PI7C7300A returns transaction termination conditions back
to the initiator. The initiator can terminate transactions with one of the following types
of termination:
!
Normal termination
Normal termination occurs when the initiator de-asserts FRAME# at the beginning of the
last data phase, and de-asserts IRDY# at the end of the last data phase in conjunction
with either TRDY# or STOP# assertion from the target.
!
Master abort
A master abort occurs when no target response is detected. When the initiator does not
detect a DEVSEL# from the target within five clock cycles after asserting FRAME#, the
initiator terminates the transaction with a master abort. If FRAME# is still asserted, the
initiator de-asserts FRAME# on the next cycle, and then de-asserts IRDY# on the
following cycle. IRDY# must be asserted in the same cycle in which FRAME# de-
asserts. If FRAME# is already de-asserted, IRDY# can be de-asserted on the next clock
cycle following detection of the master abort condition.
The target can terminate transactions with one of the following types of termination:
!
Normal termination
TRDY# and DEVSEL# asserted in conjunction with FRAME# de-asserted and IRDY#
asserted.
!
Target retry
STOP# and DEVSEL# asserted with TRDY# de-asserted during the first data phase. No
data transfers occur during the transaction. This transaction must be repeated.
!
Target disconnect with data transfer
相關(guān)PDF資料
PDF描述
PI7C7300A 3-PORT PCI-to-PCI BRIDGE
PI7C7300ANA 3-PORT PCI-to-PCI BRIDGE
PI7C8140A 2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON
PI7C8148B 2-PORT PCI-to-PCI BRIDGE PLX PC16152 COMPARISON
PI7C8150B-33 PCI Bridge | Asynchronous 2-Port PCI Bridge
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C7300A 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:3-PORT PCI-to-PCI BRIDGE
PI7C7300AEVB-3 功能描述:界面開(kāi)發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
PI7C7300ANA 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA
PI7C7300ANAE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C7300ANA-E 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA
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