參數(shù)資料
型號(hào)： PI7C7300
廠商： Pericom Semiconductor Corp.
英文描述： 3-PORT PCI-to-PCI BRIDGE
中文描述： 3端口PCI至PCI橋
文件頁數(shù)： 36/109頁
文件大?。?/td> 779K
代理商： PI7C7300
PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 36 OF 109
09/25/03 Revision 1.09
For delayed read and write transactions, PI7C7300A is able to reflect the master abort
condition back to the initiator. When PI7C7300A detects a master abort in response to a
delayed transaction, and when the initiator repeats the transaction, PI7C7300A does not
respond to the transaction with DEVSEL# which induces the master abort condition back
to the initiator. The transaction is then removed from the delayed transaction queue.
When a master abort is received in response to a posted write transaction, PI7C7300A
discards the posted write data and makes no more attempts to deliver the data.
PI7C7300A sets the received-master-abort bit in the status register when the master abort
is received on the primary bus, or it sets the received master abort bit in the secondary
status register when the master abort is received on the secondary interface. When master
abort is detected in posted write transaction with both master-abort-mode bit (bit 5 of
bridge control register) and the SERR# enable bit (bit 8 of command register for
secondary bus S1 or S2) are set, PI7C7300A asserts P_SERR# if the master-abort-on-
posted-write is not set. The master-abort-on-posted-write bit is bit 4 of the P_SERR#
event disable register (offset 64h).
Note:
When PI7C7300A performs a Type 1 to special cycle conversion, a master abort is
the expected termination for the special cycle on the target bus. In this case, the master
abort received bit is not set, and the Type 1 configuration transaction is disconnected
after the first data phase.
4.9.3
TARGET TERMINATION RECEIVED BY PI7C7300A
When PI7C7300A initiates a transaction on the target bus and the target responds with
DEVSEL#, the target can end the transaction with one of the following types of
termination:
!
Normal termination (upon de-assertion of FRAME#)
!
Target retry
!
Target disconnect
!
Target abort
PI7C7300A handles these terminations in different ways, depending on the type of
transaction being performed.
DELAYED WRITE TARGET TERMINATION RESPONSE
4.9.3.1
When PI7C7300A initiates a delayed write transaction, the type of target termination
received from the target can be passed back to the initiator. Table 4-7 shows the response
to each type of target termination that occurs during a delayed write transaction.
PI7C7300A repeats a delayed write transaction until one of the following conditions is
met:
!
PI7C7300A completes at least one data transfer.
!
!
PI7C7300A receives a master abort.
PI7C7300A receives a target abort.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C7300A 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:3-PORT PCI-to-PCI BRIDGE
PI7C7300AEVB-3 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
PI7C7300ANA 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA
PI7C7300ANAE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C7300ANA-E 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA
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