參數(shù)資料
型號： pentium II cpu with mobile
廠商： Intel Corp.
英文描述： pentium II processor With On-die Cache Mobile Module Connector 2 (MMC-2)(帶緩存和連接器2的奔II處理器)
中文描述： 奔騰II處理器芯片上緩存手機(jī)模塊連接器2（絲裂霉素2）（帶緩存和連接器2的奔二處理器）
文件頁數(shù)： 4/48頁
文件大?。?/td> 537K
代理商： PENTIUM II CPU WITH MOBILE
Intel
a
Pentium
a
II Processor With On-Die Cache Mobile Module MMC-2
4
FIGURES
Figure 1. Block Diagram of the Pentium II Processor With
On-die Cache Mobile Module MMC-2.....................6
Figure 2. 400-Pin Connector Footprint Pad Numbers..........21
Figure 3. Clock Control States..............................................24
Figure 4. BCLK, TCK, and PICCLK Generic Clock Waveform
at the Processor Core Pins....................................29
Figure 5. Power-on Sequence Timing..................................32
Figure 6. Instantaneous In-rush Current Model....................34
Figure 7. Instantaneous In-rush Current...............................35
Figure 8. Overcurrent Protection Circuit...............................36
Figure 9. Spice Simulation Using In-rush Protection
(Example ONLY))...................................................37
Figure 10. Board Dimensions with 400-Pin Connector
Orientation............................................................40
Figure 11. Board Dimensions with 400-Pin Connector-
Pin 1 Orientation..................................................41
Figure 12. Printed Circuit Board Thickness..........................41
Figure 13. Keep-out Zone .....................................................42
Figure 14. Thermal Transfer Plate (A)..................................43
Figure 15. Thermal Transfer Plate (B)..................................44
Figure 16. Standoff Holes, Board Edge Clearance, and EMI
Containment Ring................................................45
Figure 17. Product Tracking Information ..............................46
TABLES
Table 1. Connector Signal Summary..................................... 7
Table 2. Memory Signal Descriptions .................................... 9
Table 3. AGP Signal Descriptions........................................ 10
Table 4. PCI Signal Descriptions.......................................... 11
Table 5. Geyserville Descriptions......................................... 12
Table 6. Processor/PIIX4E/M Sideband Signal
Descriptions............................................................ 13
Table 7. Power Management Signal Descriptions............... 14
Table 8. Clock Signal Descriptions ...................................... 15
Table 9. Voltage Descriptions .............................................. 16
Table 10. ITP/JTAG Pins...................................................... 17
Table 11. Miscellaneous Pins............................................... 17
Table 12. Connector Pin Assignments................................. 18
Table 13. Connector Specifications ..................................... 22
Table 14. Configuration Straps for the 82433BX Host Bridge
System Controller................................................. 23
Table 15. Clock State Characteristics.................................. 26
Table 16. POS/STR Power................................................... 26
Table 17. Power Supply Design Specifications................... 27
Table 18. AC Specifications at the Processor Core Pins.... 28
Table 19. BCLK Signal Quality Specifications at the
Processor Core..................................................... 29
Table 20. Typical Voltage Regulator Efficiency................... 30
Table 21. Voltage Signal Definitions and Sequences ......... 31
Table 22. VR_ON In-rush Current........................................ 32
Table 23. Capacitance Requirement per Power Plane....... 34
Table 24. Thermal Sensor SMBus Address Table.............. 39
Table 25. Thermal Sensor Configuration Register.............. 39
Table 26. Thermal Design Power Specification................... 45
Table 27. Environmental Standards..................................... 47
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