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| 型號： | pentium II cpu with mobile |
| 廠商： | Intel Corp. |
| 英文描述： | pentium II processor With On-die Cache Mobile Module Connector 2 (MMC-2)(帶緩存和連接器2的奔II處理器) |
| 中文描述： | 奔騰II處理器芯片上緩存手機模塊連接器2（絲裂霉素2）（帶緩存和連接器2的奔二處理器） |
| 文件頁數(shù)： | 34/48頁 |
| 文件大小： | 537K |
| 代理商： | PENTIUM II CPU WITH MOBILE |
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Intel
a
Pentium
a
II Processor With On-Die Cache Mobile Module MMC-2
34
Table 23. Capacitance Requirement per Power Plane
Capacitance Requirements
Power Plane
ESR
Ripple Current
Rating
V_DC
100 uf, 0.1 uf, 0.01 uf
1
20 m
1A-3.5A
3
20% tolerance at 35V
V_5
100 uf, 0.1 uf, 0.01 uf
1
100 m
1A
20% tolerance at 10V
V_3
470 uf, 0.1 uf, 0.01 uf
1
100 m
1A
20% tolerance at 6V
V_3S
100 uf, 0.1 uf, 0.01 uf
1
100 m
N/A
20% tolerance at 6V
VCC_AGP
22 uf, 0.1 uf, 0.01 uf
1
100 m
1A
20% tolerance at 6V
V_CPUPU
2.2 uf, 8200 pf
1
N/A
N/A
20% tolerance at 6V
V_CLK2
10 uf, 8200 pf
2
N/A
N/A
20% tolerance at 6V
NOTES:
1.
2.
3.
4.
Placement of above capacitance requirements should be located near the connector.
V_CLK filtering should be located next to the system clock synthesizer.
Ripple current specification depends on V_DC input. For 5.0-V V_DC, a 3.5A device is required.
For V_DC at 18V or higher, 1A is sufficient.
4.7.4
Surge Current Guidelines
This section provides the results of a worst case, surge
current analysis. The analysis determines the maximum
amount of surge current that the Pentium II processor with
on-die cache mobile module MMC-2 can manage.
In the analysis, the module has two 4.7 microfarads with an
ESR of 0.15 ohms each. The MMC-2 is approximately 30.0
milliohms of series resistance, for a total series resistance of
0.18 ohms. If powering the system with the A/C adapter (18
volts), the amount of surge current on the module would be
approximately 100 amperes. This information is also used to
develop I/O bulk capacitance requirements. See Table 23 for
more information.
Note
: Depending on the system electronics design, different
impedances may yield different results. A thorough analysis
should be performed to understand the implications of surge
current on their system.
Figure 6 shows an electrical model used when analyzing
instantaneous in-rush conditions, and Figure 7 illustrates the
results with a SPICE simulation.
Figure 6. Instantaneous In-rush Current Model
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