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PEB 22554
Functional Description T1 / J1
Semiconductor Group
243
09.98
Transmitter
The serial bit stream is then processed by the transmitter which has the following
functions:
Frame/multiframe synthesis of one of the four selectable framing formats
Insertion of service and data link information
AIS generation (Blue Alarm)
Remote alarm (yellow alarm) generation
CRC generation and insertion of CRC bits
CRC bits inversion in case of a previously received CRC error or in case of activating
per control bit
Generation of Loop Up/Down code
IDLE code generation per DS0
The frame / multiframe boundries of the transmitter may be externally synchronized by
using the SYPX / XMFS pin. Any change of the transmit time-slot assignment will
subsequently produce a change of the framing bit positions on the line side. This feature
is required if signaling- and data link - bits are routed through the switching network and
are inserted in transmit direction via the system interface.
In loop-timed configuration (LIM2.ELT) disconnecting the control of the transmit system
highway from the transmitter is done by setting FMR5.XTM. The transmitter is now in a
free running mode without any possibility to actualize the multiframe position in case of
changing the transmit time-slot assignment. The FS/DL bits are generated independent
of the transmit system interface. For proper operation the transmit elastic buffer size
should be programmed to 2 frames.
The contents of selectable time-slots may be overwritten by the pattern defined via
register IDLE. The selection of “idle channels” is done by programming the three-byte
registers ICB1 … ICB3.
If AMI coding with zero code suppression (B7-stuffing) is selected, “clear channels”
without B7-stuffing can be defined by programming registers CCB1 … CCB3.
short buffer
disabled
yes
1 frame
enabled
yes
2 frames
enabled
yes
Buffer Size
TS Offset program.
Slip perform.