
PEB 22554
Operational Description E1
Semiconductor Group
118
09.98
EBP…
E- Bit Polarity
0…
In the basic - or multiframe asynchronous state the E-bit will be
set to zero.
1…
In the basic - or multiframe asynchronous state the E-bit will be
set to one.
If automatic transmission of sub-multiframe status is enabled by
setting bit XSP.AXS and the receiver has been lost multiframe
synchronization, the E bit with the programmed polarity will be
inserted automatically in S
i
-bit position of every outgoing CRC
multiframe (under the condition that time-slot 0 transparent mode and
transparent Si bit in Service word are both disabled).
AXS…
Automatic Transmission of Submultiframe Status
Only applicable to CRC multiframe.
0…
Normal operation.
1…
Information of submultiframe status bits RSP.SI1 and RSP.SI2
will be automatically inserted in S
i
-bit positions of the outgoing
CRC multiframe (RSP.SI1
→
S
i
-bit of frame 13; RSP.SI2
→
S
i
-bit of frame 15). Contents of XSP.XS13 and XSP.XS15 will
be ignored. If one of the time-slot 0 transparent modes
XSP.TT0 or TSWM.TSIS is enabled, bit XSP.AXS has no
function.
XSIF…
Transmit Spare Bit For International Use (FAS Word)
First bit in the FAS word. Only significant in doubleframe format. If not
used, this bit should be fixed to ‘1’. If one of the time-slot 0 transparent
modes is enabled (bits XSP.TT0, or TSWM.TSIF), bit XSP.XSIF will
be ignored.
XS13…
Transmit Spare Bit (Frame 13, CRC-Multiframe)
First bit in the service word of frame 13 for international use. Only
significant in CRC-multiframe format. If not used, this bit should be
fixed to ‘1’. The information of XSP.XS13 will be shifted into internal
transmission buffer with beginning of the next following transmitted
CRC multiframe.
If automatic transmission of submultiframe status is enabled via bit
XSP.AXS, or, if one of the time-slot 0 transparent modes XSP.TT0 or
TSWM.TSIS is enabled, bit XSP.XS13 will be ignored.