
2003 feb 10
6
Philips Semiconductors
Product specification
65 x 96 pixels matrix grey-scale LCD driver
OM6208
Notes
1.
Dummy pads are located at positions 1, 2, 4, 40 to 43, 45, 47 to 51, 78 to 82, 87, 89 to 92, 95 to 104, 139, 140, 192,
193, 242, 243, 279 and 280; alignment marks are located at positions 3 and 93; an alignment bump is located at
position 94.
Positive power supply for the liquid crystal display (see also Figs 38, 39 and 40):
a) If the internal voltage generator is used, pads V
LCDIN
, V
LCDSENSE
and V
LCDOUT
must be connected together.
b) An external LCD supply voltage can be incorporated using the V
LCDIN
pad; the internal voltage generator must
then switched off, pad V
LCDOUT
must be open-circuit (not connected to pad V
LCDIN
) and pad V
LCDSENSE
connected to the V
LCDIN
input; V
DD2,3
should be applied according to the specified voltage range. In Power-down
mode, the external LCD supply voltage must be switched off.
V
DD2
and V
DD3
supply the internal voltage generator, both have the same voltage and may be connected together
outside of the chip; V
DD1
supplies the remainder of the chip. V
DD1
, V
DD2
and V
DD3
can be connected together but
then care must be taken with respect to the supply voltage range.
When the on-chip oscillator is used, the OSC input must be connected to V
DD1
. If an external clock signal is used,
then this is connected to the OSC input. If both the oscillator and external clock are inhibited by connecting pad OSC
to V
SS1
, the display is not clocked and may be in a DC state. To avoid this, the chip should always be put into
Power-down mode before stopping the clock.
This input is not used with the 3-line serial interface and must be connected to V
DD1
or V
SS1
when this interface is in
use.
SDAHOUT is the serial data acknowledge output from the I
2
C-bus interface. By connecting SDAHOUT to SDAH
externally, the SDAH line becomes fully I
2
C-bus compatible. Having the acknowledge output separated from the
serial data line is advantageous in COG applications because here the track resistance from the SDAHOUT pad to
the system SDAH line can be significant and a potential divider can be generated by the bus pull-up resistor and the
ITO track resistance. It is possible that during the acknowledge cycle the OM6208 will not be able to create a valid
logic 0. By splitting the SDAH input from the SDAHOUT output the device could be used in a mode that ignores the
acknowledge bit. Therefore in COG applications where the acknowledge cycle is required, it is necessary to minimize
the track resistance from the SDAHOUT pad to the system SDAH line to guarantee a valid logic 0. When SDAHOUT
is not used, it must be connected to V
DD1
or V
SS1
.
When I
2
C-bus is not used, this pad must be connected to V
DD1
or V
SS1
.
SDO is a push-pull output; when it is intended to use the readback function of the OM6208, this pad must be
connected to the SDATA pad, or used separately; when I
2
C-bus interface is selected, this pad should be connected
to V
DD1
or V
SS1
.
When I
2
C-bus interface is selected this pin should be connected to V
DD1
or V
SS1
.
10. Supply rails V
SS1
and V
SS2
must be connected together.
11. Test pads T1 to T8 are not accessible to users: T1, T2, T5 and T6 must be connected to V
SS
; T3, T4, T7 and T8 must
be open-circuit.
12. Module identification bits: these bits may be read back via the ‘read back’ instruction; when the I
2
C-bus interface is
being used, these bits are the two LSBs of the slave address.
13. V
OTPROG
can be connected to SCLH/SCE pad to reduce the external connections. If not connected in this
configuration, then V
OTPROG
should be open-circuit during normal operation.
14. These pads are not accessible to users and must be left open-circuit; an explanation of the bias buffer function is
given in Section 11.9.
2.
3.
4.
5.
6.
7.
8.
9.