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參數(shù)資料
| 型號： | OM6208 |
| 英文描述： | 65 x 96 pixels matrix grey-scale LCD driver |
| 中文描述： | 65 × 96像素矩陣灰度LCD驅動器 |
| 文件頁數(shù)： | 48/68頁 |
| 文件大?。?/td> | 296K |
| 代理商： | OM6208 |
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2003 feb 10
48
Philips Semiconductors
Product specification
65 x 96 pixels matrix grey-scale LCD driver
OM6208
17.2.2
D
EFAULTS FROM INTERFACE REGISTERS
Factorydefaultsavailablefromuser-configurableregisters
are as follows:
Temperature slope selection values are set bySLA[2:0],
SLB[2:0], SLC[2:0] and SLD[2:0]
Default charge pump multiplication factor value is set by
S[1:0]
Default V
PR
value is set by V
PR
[7:0]
Default bias level values are set by BS[2:0]
Grey-scale mode default frame frequency and tuning
values are set by GFR[2:0] and GT[2:0]
Black-and-white mode default frame frequency and
tuning values are set by SFR[2:0] and ST[2:0].
17.3
Seal bit
The module maker programming is performed in a special
mode: the calibration mode (CALMM). This mode is
entered via a special interface command, CALMM. To
prevent wrongful programming, a seal bit has been
implemented which prevents the device from entering the
calibration mode. This seal bit, once programmed, cannot
be reversed, thus further changes in programmed values
arenotpossible.Applyingtheprogrammingvoltageswhen
not in CALMM mode has no effect on the programmed
values.
Table 22
Seal bit definition
17.4
OTP architecture
The OTP circuitry in the OM6208 contains many bits of
data. The circuitry for one bit is called an OTP slice. Each
OTP slice consists of two main parts: the OTP cell (a
non-volatile memory cell) and the shift register cell (a
flip-flop). The OTP cells are accessible only through their
shift register cells: both reading from and writing to the
OTP cells are performed with the shift register cells, but
only the shift register cells are visible to the rest of the
circuit. The basic OTP architecture is shown in Fig.43.
SEAL BIT
ACTION
0
1
possible to enter calibration mode
calibration mode disabled
handbook, full pagewidth
DATA TO THE CIRCUIT FOR
CONFIGURATION AND CALIBRATION
SHIFT
REGISTER
FLIP-FLOP
OTP slice
OTP CELL
SHIFT
REGISTER
SHIFT
REGISTER
DATA
INPUT
read data
from the
OTP cell
write data
to the
OTP cell
OTP CELLS
MGW841
Fig.43 Basic OTP architecture.
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相關代理商/技術參數(shù) |
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