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參數資料
| 型號： | OM6208 |
| 英文描述： | 65 x 96 pixels matrix grey-scale LCD driver |
| 中文描述： | 65 × 96像素矩陣灰度LCD驅動器 |
| 文件頁數： | 49/68頁 |
| 文件大?。?/td> | 296K |
| 代理商： | OM6208 |
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2003 feb 10
49
Philips Semiconductors
Product specification
65 x 96 pixels matrix grey-scale LCD driver
OM6208
17.4.1
OTP
OPERATIONAL EFFECTS
The OTP architecture allows the following operations:
Reading data from the OTP cells. The content of the
non-volatile OTP cells is transferred to the shift register
where upon it may affect the OM6208 operation.
Writing data to the OTP cells. First, all 9 bits of data are
shifted into the shift register via the interface. Then the
content of the shift register is transferred to the OTP
cells (there are some limitations related to storing data
in these cells, see Section 17.7).
Checking calibration without writing to the OTP cells.
Shifting data into the shift register allows the effects on
the V
LCD
voltage to be observed.
The reading of data from the OTP cells is initiated by
writing to the DON register. The OTP cells will not be
updated until the device leaves power down and the
oscillator starts. The reading operation needs up to 5 ms
to complete.
The shifting of the data into the shift register is performed
in the special mode CALMM. In the OM6208, the CALMM
mode is entered through the CALMM command. Once in
the CALMM mode the data is shifted into the shift register
via the interface at the rate of 1-bit per command. After
transmitting the last bit and exiting the CALMM mode the
serial interface is again in the normal mode and all other
commands can be sent. Care should be taken that always
all bits of data (or a multiple of all bits) are transferred
before exiting the CALMM mode, otherwise the bits will be
in the wrong positions.
In the shift register the value of the seal bit is, like the other
bits, always zero at reset. To make sure the security
feature works correctly, the CALMM command is disabled
until a Power-down mode has been left. Once a refresh is
completed, the seal bit value in the shift register is valid
and permission to enter CALMM mode can thus be
determined.
The bits are shifted into the shift register in a predefined
order as shown in Table 23.
Table 23
OTP bit order (See Fig.44 for a graphical representation)
POSITION
OTP CELL
POSITION
OTP CELL
POSITION
OTP CELL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
MMVPR[7]
MMVPR[6]
MMVPR[5]
MMVPR[4]
MMVPR[3]
MMVPR[2]
MMVPR[1]
MMVPR[0]
MMSLD[2]
MMSLD[1]
MMSLD[0]
MMSLC[2]
MMSLC[1]
MMSLC[0]
MMSLB[2]
MMSLB[1]
MMSLB[0]
MMSLA[2]
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
MMSLA[1]
MMSLA[0]
MMS[1]
MMS[0]
MMBS[2]
MMBS[1]
MMBS[0]
MMFD
MMVOPCAL[5]
MMVOPCAL[4]
MMVOPCAL[3]
MMVOPCAL[2]
MMVOPCAL[1]
MMVOPCAL[0]
MMGFR[2]
MMGFR[1]
MMGFR[0]
MMGT[2]
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
MMGT[1]
MMGT[0]
MMSFR[2]
MMSFR[1]
MMSFR[0]
MMST[2]
MMST[1]
MMST[0]
MMNL[6]
MMNL[5]
MMNL[4]
MMNL[3]
MMNL[2]
MMNL[1]
MMNL[0]
MMFI
SEAL
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相關代理商/技術參數 |
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|---|---|
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| OM62112 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:48 X 84 dot matrix LCD driver |
| OM6211F1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:48 X 84 dot matrix LCD driver |
| OM6211U | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:48 X 84 dot matrix LCD driver |
| OM6213 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:48 x 84 pixels matrix LCD driver |
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