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參數(shù)資料
| 型號： | OM6208 |
| 英文描述： | 65 x 96 pixels matrix grey-scale LCD driver |
| 中文描述： | 65 × 96像素矩陣灰度LCD驅(qū)動器 |
| 文件頁數(shù)： | 52/68頁 |
| 文件大?。?/td> | 296K |
| 代理商： | OM6208 |
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2003 feb 10
52
Philips Semiconductors
Product specification
65 x 96 pixels matrix grey-scale LCD driver
OM6208
17.7
Programming flow
Programming is achieved whilst in CALMM mode and with
the application of the programming voltages. As the data
for programming the OTP cell is contained in the
corresponding shift register cell, the shift register cell must
be loaded with a logic 1 in order to program the
corresponding OTP cell. If the shift register cell contains
a logic 0, then no action will take place when the
programming voltages are applied.
Once an OTP cell is programmed it cannot be
de-programmed. An already programmed cell (an OTP
cell containing a logic 1) must not be reprogrammed.
A sequence of commands and data for OTP programming
is shown as an example in Table 26.
Although the order for programming cells is not significant,
it is recommended that the seal bit is programmed last.
Once this bit has been programmed it will not be possible
to re-enter the CALMM mode.
During programming, a substantial current flows in the
V
LCDIN
pin. For this reason it is recommended
programming only one OTP cell at a time. This is achieved
by filling all but one shift register cells with logic 0.
The programming specification refers to the voltages at
the chip pads, therefore the contact resistance is
significant and must be considered by the user.
Table 26
Sequence for OTP programming
This sequence assumes the OM6208 has just been reset.
Note
1.
The data for the bits is not in the correct shift register position until all the bits have been sent.
STEP
D/C
D7
D6
D5
D4
D3
D2
D1
D0
ACTION
1
2
3
4
5
6
7
7
9
0
1
0
1
0
1
1
1
1
exit power-down (DON = 1)
wait 5 ms for refresh to take effect
enter CALMM mode and OSE
shift-in data, MMVPR[7] is first bit; note 1
MMVPR[6]
MMVPR[5]
MMVPR[4]
MMVPR[3]
MMVPR[2]
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
0
0
10
:
58
59
60
:
0
0
:
1
1
:
1
1
:
0
0
:
1
1
:
1
1
:
0
0
:
0
1
:
0
0
MMFI
seal bit
apply programming voltage at
pins V
OTPPROG
and V
LCDIN
according to
Section 17.8
Repeat steps 5 to 60 for each bit that should be programmed to 1
61
apply external reset
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