參數(shù)資料
型號(hào)： MT90869AG
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 路由/交換
英文描述： Flexible 16K Digital Switch (F16kDX)
中文描述： TELECOM, DIGITAL TIME SWITCH, PBGA272
封裝： 27 X 27 MM, 1.27 MM PITCH, PLASTIC, MS-034-BAL-2, BGA-272
文件頁(yè)數(shù)： 53/76頁(yè)
文件大?。?/td> 1316K
代理商： MT90869AG
Data Sheet
MT90869
53
Zarlink Semiconductor Inc.
13.8.1
Local Output Advancement Bits 1-0 (LOA1-LOA0)
The binary value of these two bits is the amount of offset that a particular stream output can be advanced. When
the advancement is 0, the serial output stream has the normal alignment with the local frame pulse.
Table 28 - Local Output Advancement (LOAR) Programming Table
13.9
Backplane Output Advancement Registers (BOAR0 - 31)
Address 00A3h to 00C2h
Thirty-two Backplane Output Advancement Registers (BOAR0 to BOAR3) allow users to program the output
advancement for output data streams BSTo0 to BSTo31. For 2Mb/s, 4Mb/s, 8Mb/s and 16Mb/s stream operation
the possible adjustment is -2, -4 or -6 cycles of the internal system clock (131.072MHz). For 32Mb/ s stream
operation the possible adjustment is -1, -2 or -3 cycles of the internal system clock (131.072MHz). The
BOAR0
to
BOAR3
registers are configured as follows:
Table 29 - Backplane Output Advancement Register (BOAR) Bits
Local Output Advancement
Corresponding Advancement Bits
Clock Rate 131.072MHz
LOA1
LOA0
0 (Default)
0
0
-2 cycle
0
1
-4 cycles
1
0
-6 cycles
1
1
BOARn Bit
(where n = 0 to 31 for non-32Mb/s
mode, n = 0 to 15 for 32Mb/s mode)
Name
Reset
Description
15-2
Reserved
0
Reserved
1:0
BOA(1:0)
0
Backplane Output Advancement Register
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90869AG2 制造商:Microsemi Corporation 功能描述:PB FREE 8K X 8K DIGITAL SWITCH 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 16KX16K/8KX8K 1.8V/3.3V 272BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F16KDX 272PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F16KDX 272PBGA
MT90870 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Flexible 12 k Digital Switch (F12kDX)
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