參數(shù)資料
型號: MT90869AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 路由/交換
英文描述: Flexible 16K Digital Switch (F16kDX)
中文描述: TELECOM, DIGITAL TIME SWITCH, PBGA272
封裝: 27 X 27 MM, 1.27 MM PITCH, PLASTIC, MS-034-BAL-2, BGA-272
文件頁數(shù): 17/76頁
文件大?。?/td> 1316K
代理商: MT90869AG
Data Sheet
MT90869
17
Zarlink Semiconductor Inc.
Figure 10 - Backplane and Local Input Bit Delay Timing Diagram for Data Rate of 16Mb/s
C8o
7
2
3
4
5
6
1
0
BSTi0-31/LSTi0-31
Bit Delay = 0
Ch0
7
4
5
6
Ch1
2
3
1
0
BSTi0-31/LSTi0-31
Bit Delay = 1/4
7
2
3
4
5
6
1
0
BSTi0-31/LSTi0-31
Bit Delay = 1
Ch0
7
5
6
Ch1
2
3
1
0
(Default)
7
2
3
4
5
6
1
0
Ch0
7
4
5
6
Ch1
2
3
1
0
Ch255
Ch255
Ch255
Bit Delay, 1/4
Bit Delay, 1
BSTi0-31/LSTi0-31
Bit Delay = 1/2
7
2
3
4
5
6
1
0
Ch0
7
4
5
6
Ch1
2
3
1
0
Ch255
Bit Delay, 1/2
BSTi0-31/LSTi0-31
Bit Delay = 3/4
7
2
3
4
5
6
1
0
Ch0
7
4
5
6
Ch1
2
3
1
0
Ch255
Bit Delay, 3/4
BSTi0-31/LSTi0-31
Bit Delay = 7
1/2
7
2
3
4
5
6
1
0
Ch255
7
4
5
6
Ch0
2
1
0
Ch254
Bit Delay, 7
1/2
BSTi0-31/LSTi0-31
Bit Delay = 7
3/4
7
2
3
4
5
6
1
0
Ch255
7
4
5
6
Ch0
2
1
0
Ch254
Bit Delay, 7
3/4
FP8o
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