參數(shù)資料
型號: MT46HC32M16LFCX-75:B
元件分類: DRAM
英文描述: 32M X 16 DDR DRAM, 7.5 ns, PBGA90
封裝: 9 X 13 MM, GREEN, PLASTIC, VFBGA-90
文件頁數(shù): 42/98頁
文件大小: 3258K
State Diagram
Figure 15: Simplified State Diagram
Power
on
Power
applied
SREF
LMR
AREF
SREFX
ACT
CKEL
CKEH
PRE
PREALL
LMR
EMR
Deep
power-
down
Self
refresh
Idle:
all banks
precharged
Row
active
Burst
terminate
READING
Automatic sequence
Command sequence
WRITING
WRITE
WRITING
WRITE A
Precharging
Active
power-
down
Precharge
power-
down
Auto
refresh
PRE
WRITE A
READ A
PRE
READ A
READ
BST
DPD
DPDX
READ
SRR
READ
PRE
LMR
ACT = ACTIVE
DPDX = Exit deep power-down
READ A = READ w/ auto precharge
AREF = AUTO REFRESH
EMR = LOAD EXTENDED MODE REGISTER
SREF = Enter self refresh
BST = BURST TERMINATE
LMR = LOAD MODE REGISTER
SREFX = Exit self refresh
CKEH = Exit power-down
PRE = PRECHARGE
SRR = STATUS REGISTER READ
CKEL = Enter power-down
PREALL = PRECHARGE all banks
WRITE = WRITE w/o auto precharge
DPD = Enter deep power-down
READ = READ w/o auto precharge
WRITE A = WRITE w/ auto precharge
WRITE
WRITE A
512Mb: x16, x32 Mobile LPDDR SDRAM
State Diagram
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
47
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2004 Micron Technology, Inc. All rights reserved.
相關PDF資料
PDF描述
MT46HC32M16LGCM-54IT:B 32M X 16 DDR DRAM, 5.4 ns, PBGA90
MT47H32M16BT-37VL:A 32M X 16 DDR DRAM, 0.5 ns, PBGA92
MT47H64M16HQ-3IT:G 64M X 16 DDR DRAM, 0.4 ns, PBGA60
MT47H64M8CF-5EAT:F DDR DRAM, PBGA60
MT48H16M16LFBF-10IT 16M X 16 SYNCHRONOUS DRAM, 7 ns, PBGA54
相關代理商/技術參數(shù)
參數(shù)描述
MT46V128M4 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM