參數(shù)資料
型號(hào)： MT46HC32M16LFCX-75:B
元件分類： DRAM
英文描述： 32M X 16 DDR DRAM, 7.5 ns, PBGA90
封裝： 9 X 13 MM, GREEN, PLASTIC, VFBGA-90
文件頁(yè)數(shù)： 30/98頁(yè)
文件大?。?/td> 3258K
Table 17: DM Operation Truth Table
Name (Function)
DM
DQ
Notes
Write enable
L
Valid
Write inhibit
H
X
Notes: 1. Used to mask write data; provided coincident with the corresponding data.
2. All states and sequences not shown are reserved and/or illegal.
DESELECT
The DESELECT function (CS# HIGH) prevents new commands from being executed by
the device. Operations already in progress are not affected.
NO OPERATION
The NO OPERATION (NOP) command is used to instruct the selected device to perform
a NOP. This prevents unwanted commands from being registered during idle or wait
states. Operations already in progress are not affected.
LOAD MODE REGISTER
The mode registers are loaded via inputs A[0:n]. See mode register descriptions in Stand-
MODE REGISTER command can only be issued when all banks are idle, and a subse-
quent executable command cannot be issued until tMRD is met.
ACTIVE
The ACTIVE command is used to activate a row in a particular bank for a subsequent
access. The values on the BA0 and BA1 inputs select the bank, and the address provided
on inputs A[0:n] selects the row. This row remains active for accesses until a PRE-
CHARGE command is issued to that bank. A PRECHARGE command must be issued
before opening a different row in the same bank.
512Mb: x16, x32 Mobile LPDDR SDRAM
Commands
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
36
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2004 Micron Technology, Inc. All rights reserved.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT46V128M4 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DOUBLE DATA RATE DDR SDRAM
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