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參數(shù)資料
| 型號： | MPC107 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 32-Bit Microprocessor(32位微處理器) |
| 中文描述： | 32位微處理器（32位微處理器） |
| 文件頁數(shù)： | 20/46頁 |
| 文件大?。?/td> | 585K |
| 代理商： | MPC107 |
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20
MPC107 Hardware Specifications (Rev 0.2)
PRELIMINARYSUBJECT TO CHANGE WITHOUT NOTICE
Electrical and Thermal Characteristics
1.4.3.3.1 PCI Signal Output Hold Timing
In order to meet minimum output hold speciTcations relative to PCI_SYNC_IN for both 33 MHz and 66
MHz PCI systems, the MPC107 has a programmable output hold delay for PCI signals. The initial value of
the output hold delay is determined by the values on the SDMA4 and SDMA3 reset conTguration signals.
Further output hold delay values are available by programming the PCI_HOLD_DEL value of the PMCR2
conTguration register.
Table 11 describes the bit values for the PCI_HOLD_DEL values in PMCR2.
.
Table 11. Power Management Configuration Register 20x72
Bit
Name
Reset
Value
Description
6D4
PCI_HOLD_DEL
xx0
PCI output hold delay values relative to PCI_SYNC_IN. The initial
values of bits 6 and 5 are determined by the reset conTguration pins
SDMA4 and SDMA3, respectively. As these two pins have internal
pull-up resistors, the default value after reset is 0b110.
While the minimum hold times are guaranteed at shown values,
changes in the actual hold time can be made by incrementing or
decrementing the value in these bit Telds of this register via software
or hardware conTguration. The increment is in approximately 400
picosecond steps. Lowering the value in the three bit Teld decreases
the amount of output hold available.
000 66 MHz PCI. Pull-down SDMA4 conTguration pin with a 2K
W
or
less value resistor. This setting guarantees the minimum output
hold, item 13a, and the maximum output valid, item 12a, times
as speciTed in Figure 10 are met for a 66 MHz PCI system. See
Figure 11.
001
010
011
100 33 MHz PCI. This setting guarantees the minimum output hold,
item 13a, and the maximum output valid, item 12a, times as
speciTed in Figure 10 are met for a 33 MHz PCI system. See
Figure 11.
101
110 (Default if reset conTguration pins left unconnected)
111
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