
155
4.6 Port 5
4.6.1
Port-5 Register (PDR5)
This section describes the port-5 register.
s Port-5 Register Functions
r Port 5 data register (PDR5)
The PDR5 register holds the output latch states. Therefore, pin states cannot be checked by
reading this register.
r Settings as an analog input
When Port 5 pins are used as analog signal inputs, write "1" to the corresponding bits of PDR5
to turn the output transistors "OFF". Setting the pins to the high-impedance state.
Table 4.6-3 "Port-4, Port-6, and Port-7 Register Function" lists the functions of the port-5
register.
R/W: Readable and writable
*: Pins with a pull-up resistor go to the pull-up state.
r Port 5 pull-up control registers (PURR5)
By using pull-up resistor option in each pin for port 5, setting is possible bit by bit when writing to
pull-up control register for MB89P985 and MB89PV980 only. The pull-up resistor for MB89983
is selected by mask option.
When pull-up resistor is selected in pull-up register in stop and clock mode (SPL=1). The state
of these pin are in "H" level (pull up state) rather than high impedance. However, during reset,
pull up is unavailable and will be in high impedance state.
Figure 4.6-3 "Pull up control registers setting (PURR5)" is list of the pull-up resistor option
setting of PURR5
Table 4.6-3 Port-4, Port-6, and Port-7 Register Function
Register
Data
Read
Write
Read/
Write
Address
Initial value
Port 5 data
register
(PDR5)
0
Output latch
value is "0".
Outputs an "L" level to the
pin.
(Sets "0" to the output latch
and turn the output transistor
"ON")
R/W
000FH
XXXX1111B
1
Output latch
value is "1".
Sets the pin to the high-
impedance state*.
(Sets "1" to the output latch
and turn the output transistor
"OFF.)