
187
7.1 Overview of 8-bit PWM Timer
case, the interval time and the frequency of the square wave output from the PWM1 or
PWM2 pin (where the PWM timer operates continuously and the value of the COMR register
is constant) are calculated as follows.
Assume that the main clock mode (SCS = 1) and its highest clock speed has been selected
via the system clock control register (STCC: SCS = 1, CS = 11B, CS0 = 11B, 1 instruction
cycle = 4/FCH).
s PWM Timer Function
The PWM timer function has 8-bit resolution and can control the "H" and "L" widths of one cycle.
8-Bit PWM Timers 1 and 2 can be operated independently of each other.
As the resolution is 1/256, pulses can be output with duty ratios of between 0 and 99.6%.
The cycle of the PWM wave can be selected from four types.
The PWM timer can be used as a D/A converter by connecting the output to a low pass filter.
Table 7.1-2 "Available PWM Wave Cycle for PWM Timer Function" lists the available PWM
wave cycles for the PWM timer function. Figure 7.1-1 "Example D/A Converter Configuration
Using PWM Output and Low Pass Filter" shows an example D/A converter configuration.
tinst: Instruction cycle (affected by clock mode, etc.)
tlext: 8/16-bit timer/counter Timer 1 external clock period (8-bit PWM Timer 1 only)
8-bit timer output cycle: 8/16-bit timer/counter 8-bit timer output (Timer 1, Timer 2)
Interval time
= (1× 4/FC) × (COMR register value + 1)
= (4/4.2 MHz) × (221 + 1)
= 211
s
Output frequency
= FCH/(1× 8 × (COMR register value +1))
= 4.2 MHz/(8 × (221 + 1))
= 2.4 kHz
Table 7.1-2 Available PWM Wave Cycle for PWM Timer Function
12
3
4
Internal count clock
8-bit Timer Output Cycle Times
Count clock cycle
1 tinst
16 tinst
64 tinst
22 tinst to
210 tinst
26 tinst to
214 tinst
210 tinst to
218 tinst
1 tlext to
28 text
PWM wave cycle
28 tinst
212 tinst
214 tinst
210 tinst to
218 tinst
214 tinst to
222 tinst
218 tinst to
226 tinst
28 tlext to
216 text