參數(shù)資料
型號: M66271FP
元件分類: 顯示控制器
英文描述: 320 X 240 DOTS DOT MAT LCD DSPL CTLR, PQFP80
封裝: QFP-80
文件頁數(shù): 19/30頁
文件大?。?/td> 309K
代理商: M66271FP
M66271FP
REJ03F0267-0200 Rev.2.00 Mar 18, 2008
Page 24 of 27
(3) Write to VRAM (
RD = "H")
MCS
LWR
(+
HWR)
WAIT
D <7:0>
(D <15:0>)
A <13:0>
(+
BHE)
Address is established
th (WR-A)
tw (WR)
th (MCS-A)
tw (MCS)
th (MCS-D)
"H"
tsu (D-MCS)
tsu (A-MCS)
tsu (A-WR)
Term of non cycle steal access
tsu (D-WR)
th (WR-D)
Data input is established
(4) Read from VRAM (
LWR, HWR = "H")
MCS
RD
WAIT
D <7:0>
(D <15:0>)
A <13:0>
Address is established
th (RD-A)
th (MCS-A)
tdis (MCS-D)
"H"
ta (MCS-D)
tsu (A-MCS)
ta (RD-D)
tsu (A-RD)
Term of non cycle steal access
tdis (RD-D)
Data output is established
Note: 2. Writing/Reading operation for VRAM during non cycle steal access is performed during overlapping
MCS
and [
LWR (+HWR) or RD].
Limits of
MCS, LWR (+HWR) and RD are prescribed by the input signal of last change to "L" in starting
access, and by the input signal of first change to "H" in ending access.
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