
M66271FP
REJ03F0267-0200 Rev.2.00 Mar 18, 2008
Page 19 of 27
(2-6)
Display start address register [R6, R7]
Address
R/W
Function
Reset
01010
SAL
01100
SAH
R/W
SAH
SAL
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
Display Start
Address
0
0000H
0
1
0001H
0
1
0
0002H
↓
1
0
1
0
1
0
1
257FH
D6 and D7 output "0" when read SAH.
It is possible to set display start address to the extent of 257F
H (= 9600 address).
Don't set over 2580
H.
When reset, SAL and SAH = "0000
H"
Display start address is established by the writing data to SAH register. Even if only change SAL,
surely set SAH after SAL.
When select 8-bit MPU, start address set in SAL <D7 to D0> + SAH <D5 to D0>.
When select 16-bit MPU, start address set in SAL <D7 to D1>+ SAH <D5 to D0>.
Even it selecting 16-bit MPU, enable to set display start address in character unit.
In case the display reading data from VRAM start at D <15:12>, set SAL <D0> = "0", and if start at D
<7:4>, set SAL <D0> = "1". (Refer to figure 8)
0000H
(2-7) M cycle variable register [R8]
Address
R/W
Function
Reset
01110
W
MT
D7
D6
D5
D4
D3
D2
D1
D0
Cycle of M
0
Toggle change at every 1 frame.
0
1
Toggle change at every 1 line (1LP).
0
1
0
Toggle change at every 2 lines.
↓
1
Toggle change at every 255 lines.
Set the cycle of M. In case of MT = 01
H, M repeat reversal (toggle) at every 1 line (at every 1 count of
LP).
When reset, MT = "00
H", toggle M signal at every 1 frame.
We recommend this register set suitable value for user's LCD.
00H
(2-8) Data port register [R9]
Address
R/W
Function
Reset
10000
R/W
DP
D7
D6
D5
D4
D3
D2
D1
D0
Data Port (8-bit)
Exclusive data port register for the LCD module built-in system.
Reading or writing 8-bit data between MPU and VRAM through this register.
VRAM address index register (IDXL, IDXH) is increased of +1, when finished access to DP.
Output indefinite data when reset.
XXH
(indefinite)