參數(shù)資料
型號： M66271FP
元件分類： 顯示控制器
英文描述： 320 X 240 DOTS DOT MAT LCD DSPL CTLR, PQFP80
封裝： QFP-80
文件頁數(shù)： 18/30頁
文件大?。?/td> 309K
代理商： M66271FP
M66271FP
REJ03F0267-0200 Rev.2.00 Mar 18, 2008
Page 23 of 27
Timing Diagram
(1) Write to Control Register (
RD = "H")
IOCS
LWR
WAIT
D <7:0>
A <4:0>
Address is established
th (LWR-A)
tw (LWR)
th (IOCS-A)
tw (IOCS)
th (IOCS-D)
"H"
tsu (D-IOCS)
tsu (A-IOCS)
tsu (A-LWR)
Without WAIT
tsu (D-LWR)
th (LWR-D)
Data input is established
(2) Read from Control Register (
LWR = "H")
IOCS
RD
WAIT
D <7:0>
A <4:0>
Address is established
th (RD-A)
th (IOCS-A)
tdis (IOCS-D)
"H"
ta (IOCS-D)
tsu (A-IOCS)
ta (RD-D)
tsu (A-RD)
Without WAIT
tdis (RD-D)
Data output is established
Note: 1. Writing/Reading operation for the control register is performed during overlapping
IOCS and (LWR or RD).
Limits of
IOCS, LWR and RD are prescribed by the input signal of last change to "L" in starting access, and
by the input signal of first change to "H" in ending access.
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