參數(shù)資料
型號(hào)： M66271FP
元件分類： 顯示控制器
英文描述： 320 X 240 DOTS DOT MAT LCD DSPL CTLR, PQFP80
封裝： QFP-80
文件頁(yè)數(shù)： 15/30頁(yè)
文件大小： 309K
代理商： M66271FP
M66271FP
REJ03F0267-0200 Rev.2.00 Mar 18, 2008
Page 20 of 27
(2-9) VRAM address index register [R10, R11]
Address
R/W
Function
Reset
10010
IDXL
10100
IDXH
R/W
IDXH
IDXL
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
Accessing
VRAM Address
0
00000
0000H
0
00000
00001
0001H
0
00000
00010
0002H
↓
1
0
1
01011
11111
257FH
Exclusive VRAM address index register for the LCD module built-in system.
It is possible to change the register only one side, because IDXH and IDXL are independent each
other.
It is possible to set VRAM access address to the extent of 257F
H (= 9600 address).
Don't set address over 2580
H.
D6 and D7 output "0" when read IDXH
When reset, IDXL and IDXH = "0000
H".
0000H
Description of LCD Display
Relation between Setting of Control Register and LCD Displaying
1 horizontal line
LPW
CR
CSW
SLT
OSC
Character number of horizontal display
1 Character number = 8 dots display
12
3
n
2 n 1
n
Horizontal synchronous pulse width
LPW
Data is indefinite
× Vertical line number SLT
Condition of control register
(CR
× 8) × SLT ≤ 76800 dots
CP
UD <3:0>
LP
1
2
1 horizontal line
(1) Time for processing a horizontal line (TH)
(2) Time for processing a frame (TFR)
TH =
fosc
2
× (CR + LPW)
TFR = TH
× SLT
CR, LPW, CSW: Unit of character number
SLT: Unit of line number
fosc: Internal OSC clock frequency
after dividing OSC1 input
By adjusting LPW, it is possible to set a frame frequency
which is requested from LCD PANEL the fittest value.
Expectant
LCD PANEL
Figure 6 Relation between Setting of Control Register and LCD Displaying
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