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參數(shù)資料
| 型號(hào)： | M66271FP |
| 元件分類： | 顯示控制器 |
| 英文描述： | 320 X 240 DOTS DOT MAT LCD DSPL CTLR, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁(yè)數(shù)： | 17/30頁(yè) |
| 文件大?。?/td> | 309K |
| 代理商： | M66271FP |
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M66271FP
REJ03F0267-0200 Rev.2.00 Mar 18, 2008
Page 22 of 27
Output Signal of LCD Side
LCDENB
OSC1
(3) LCDENB output signal
(2) Output signal per frame
(1) Output signal per line
LP
FLM
M
LP
CP
OSC1
UD <3:0>
239
240
1
239
240
1
2
79
80
1
2
80
(6) 240th line of 1st frame-1st line of 2nd frame
(5) 1st line-2nd line
(4) Reset-1st line of 1st frame
RESET
76
77
78
79
80
76
77
78
79
80
12
3
4
5
67
8
1
2345
6
12
3
4
5
6
78
Division of OSC1 = 1
Output every display data transfer
4-bit parallel output
Output when finish the transfer of
one line of display data.
Output at finishing the transfer of
first line display data.
Cycle of reversing output of M is
able to be set by MT register.
"L"
1st line of 1st frame
2nd line
1st line
240th line of 1st frame
1st line of 2nd frame
Ex.) Assuming 320
× 240 dots LCD
(In setting of CR = 40 characters, LPW = 2 characters, SLT = 240 lines, OSCC = 1 division, MT = 1 toggle per line)
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