參數(shù)資料
型號(hào)： LC73101C
文件頁(yè)數(shù)： 5/34頁(yè)
文件大小： 217K
代理商： LC73101C
Pin
I/O
Function
Number of pins
LCD segment drive outputs.
One of the V
1
, V
3
, V
4
, and V
SS
levels is selected by the combination of the contents of display RAM and the
FR signal.
SEG0 to
O
132
SEG131
LCD common drive outputs.
One of the V
1
, V
2
, V
5
, and V
SS
levels is selected by the combination of the scan data and the FR signal.
COM0 to
O
80
COM80
No. 6853-5/34
LC73101C
Pin
I/O
Function
Number of pins
Display clock input or output.
The M/S and CLS pins determine the operating state as shown in the table below.
CL
I/O
1
When two LC73101C chips are used together in master/slave mode, their CL pins must be connected together.
LCD alternation signal input or output.
FR
I/O
M/S = high: Output
M/S = Low: Input
1
When two LC73101C chips are used together in master/slave mode, their FR pins must be connected together.
Indicates the on/off state of the LCD display.
M/S = high: Output
M/S = Low: Input
DOF
I/O
1
When two LC73101C chips are used together in master/slave mode, their DOF pins must be connected
together.
V1 voltage adjustment resistor selection.
IRS = high: Internal resistor used.
IRS = low: Internal resistor not used. In this case, the V
1
voltage is adjusted by the VR pin and the external
divider resistor circuit.
IRS
I
1
This pin is only valid in master mode. This pin must be held either low or high for slave mode operation.
LCD drive power supply circuit power control.
HPM
I
HPM = high: Normal mode
HPM = low: High power mode
1
This pin is only valid in master mode. This pin must be held either low or high for slave mode operation.
Continued from preceding page.
M/S
CLS
CL
“H”
“H”
Output
“L”
Input
“L”
“H”
Input
“L”
Input
RAM data
FR
Output voltage
Display positive level
Display inverted level
H
H
V
1
V
SS
V
3
V
4
V
3
V
4
V
1
V
SS
H
L
L
H
L
L
Power saving mode
—
V
SS
Scan data
FR
Output voltage
H
H
V
SS
V
1
V
2
V
5
V
SS
H
L
L
H
L
L
Power saving mode
—
LCD Drive Pins
Pin
I/O
Function
Number of pins
TEST0
to 7
O
IC test pins. These pins must be left open.
8
TEST8
I
IC test pin. This pin must be left open.
1
Test Pins
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