
19. Electronic Potentiometer
Controls the LCD drive voltage V
1
output from the internal LCD power supply voltage adjustment circuit and adjusts the
contrast of the LCD display.
These commands form a 2-byte command pair: the Electronic Potentiometer Mode Set command and the Electronic
Potentiometer Register Set command. These two commands must be issued consecutively.
19-1. Electronic Potentiometer Mode Set
When this command is issued, the electronic Potentiometer Register Set command is enabled. Once the electronic
potentiometer mode is set, no command other than the Electronic Potentiometer Register Set command can be used. This
state is cleared after data is stored into the register with the Electronic Potentiometer Register Set command.
19-2. Electronic Potentiometer Register Set
This command sets the LCD drive voltage V
1
to one of 64 voltage levels by writing 6 bits of data to the electronic
potentiometer register.
Electronic potentiometer mode is cleared after this command is issued and the electronic potentiometer register has been
set.
This register is set to (X, X, 1, 0, 0, 0, 0, 0) when the electronic potentiometer function is not used.
20. Power Save
The LC73101C can be set to its power saving mode by issuing the Display Off command and the All Display Pixels Lit
On command. Power consumption can be reduced significantly by setting the LC73101C to power saving mode.
In power saving mode, the states of the display data and the operating mode prior to power saving mode are retained, and
the microcontroller can access the display data RAM.
Power saving mode is cleared using the All Display Pixels Lit Off command.
In power saving mode, all LCD display system operations are stopped and current can be reduced to a value close to the
quiescent current even when RAM is not accessed by the microcontroller. The internal states in this mode are as follows.
(1) The oscillator circuit and the LCD power supply circuit are stopped.
(2) All LCD drive circuits are stopped and the segment and common driver outputs go to the V
SS
level.
No. 6853-26/34
LC73101C
A0
RD
WR
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
1
0
0
0
0
0
0
1
A0
RD
WR
D7
×
D6
×
D5
D4
D3
D2
D1
D0
α
63
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
62
0
0
0
0
1
0
61
↓
2
↓
1
1
1
1
0
1
1
1
1
1
1
0
1
1
1
1
1
1
1
0
Display On/Off
All Display Pixels Lit
Setting
On
Off
Power saving mode cleared
On
On
(normal operating state)
Off
Off
Off
On
Power saving mode