
3. Display Start Common Set
Sets the common address for the start of display from display data RAM. This address is set in two operations: first the
upper 3 bits and then the lower 4 bits. Both the upper and lower bits can be set independently.
At reset, the display start common address is reset to 00H. In partial display mode, the content displayed position can be
changed without changing the contents of display RAM by changing the address with this command.
See the functional description in the “Common Address Circuit” section for details.
4. Page Address Set
Sets the page address used when the display data RAM is accessed from the microcontroller.
The display data RAM is accessed in 8-bit units using a page address and a column address.
At reset, the page address is reset to 0.
See the functional description in the "Page Address Circuit" section for details.
No. 6853-20/34
LC73101C
A0
RD
WR
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
0
1
1
0
X
C6
C5
C4
0
1
1
1
C3
C2
C1
C0
C6
C5
C4
C3
C2
C1
C0
Display Start Common Address
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
↓
1
0
1
0
2
↓
78
1
0
0
1
1
0
1
0
0
1
1
1
1
79
A0
RD
WR
D7
D6
D5
D4
D3
D2
D1
D0
Page address
0
1
0
1
0
1
1
0
0
0
0
0
0
0
0
1
1
0
0
1
0
2
↓
8
↓
1
0
0
0
1
0
0
1
9