參數(shù)資料
型號(hào)： LC73101C
文件頁(yè)數(shù)： 22/34頁(yè)
文件大?。?/td> 217K
代理商： LC73101C
8. Display Data Read
Reads 8 bits of data from the address specified for display data RAM. After the read, the column address is automatically
incremented to allow the microcontroller to read display data continuously.
Note that one dummy read is required immediately after the column address is set. It is not possible to read out display
data using the serial interface.
9. Column Address/Segment Output Correspondence Selection
Allows the correspondence between the display RAM data column address and the segment driver outputs to be inverted.
10. Display Normal/Inverted
Allows pixel on/off states to be inverted without rewriting the contents of display data RAM.
The contents of display data RAM are retained unchanged by this operation.
11. All Display Pixels Lit On/Off
Allows all the pixels in the display to be forcibly set to the on state regardless of the contents of display data RAM.
The contents of display data RAM are retained unchanged by this operation.
This command takes priority over the Display Normal/Inverted command.
When a Display All Pixels Lit On command is issued with the device in the display off state, the device goes to the
power saving state.
No. 6853-22/34
LC73101C
A0
RD
WR
D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
Read data
A0
RD
WR
D7
D6
D5
D4
D3
D2
D1
D0
Setting
0
1
0
1
0
1
0
0
0
0
0
Normal: Column address 0
→
SEG0
Column address 131
→
SEG131
Inverted:Column address 0
→
SEG131
Column address 131
→
SEG0
1
A0
RD
WR
D7
D6
D5
D4
D3
D2
D1
D0
Setting
0
1
0
1
0
1
0
0
1
1
0
RAM data high
→
LCD pixel on
RAM data low
→
LCD pixel on
1
A0
RD
WR
D7
D6
D5
D4
D3
D2
D1
D0
Setting
0
1
0
1
0
1
0
0
1
0
0
Normal display state
1
All pixels lit state.
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