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參數(shù)資料
| 型號： | K9F4G08U0M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512M x 8 Bits / 1G x 8 Bits NAND Flash Memory |
| 中文描述： | 512M x 8位/ 1克× 8位NAND閃存 |
| 文件頁數(shù)： | 16/41頁 |
| 文件大?。?/td> | 1076K |
| 代理商： | K9F4G08U0M |
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FLASH MEMORY
16
Advance
K9F4G08U0M
K9K8G08U1M
NAND Flash Technical Notes
(Continued)
Copy-Back Operation with EDC & Plane Definition for EDC
Generally, copy-back program is very powerful to move data stored in a page without utilizing any external memory. But, if the source
page has a bit error for charge loss or charge gain, accumulated copy-back operations could also accumulate bit errors. For this rea-
son, two-bit ECC is recommanded for copy-back operation.
Because K9F4G08U0M supports Copy Back with EDC operation, only 1-bit ECC is sufficient for copy-back operation. During Copy-
Back operation, the system controller can detect a bit error for each 528-byte plane by monitoring the Status bits (I/O1 & I/O 2) of the
Status Register.
There are some restrictions against programming unit in copy-back operation with EDC. For enabling EDC operation, the page pro-
gram should be performed with the whole page unit (2,112-byte) or the each 528-byte plane unit. A page of 2,112-byte is composed
of 4 planes of 528-byte and each 528-byte plane is made up of 512-byte in the main area and 16-byte in the spare area.
"A" area
(1’st plane)
512 Byte
"H" area
(4’th plane)
Main Area (2,048 Byte)
16 Byte
"G" area
(3’rd plane)
16 Byte
"F" area
(2’nd plane)
16 Byte
"E" area
(1’st plane)
16 Byte
"B" area
(2’nd plane)
512 Byte
"C" area
(3’rd plane)
512 Byte
"D" area
(4’th plane)
512 Byte
Spare Area (64 Byte)
Table 2. Definition of the 528-Byte Plane
Plane
Main Area (Column 0~2,047)
Spare Area (Column 2,048~2,111)
Area Name
Column Address
Area Name
Column Address
1’st 528-Byte Plane
"A"
0 ~ 511
"E"
2,048 ~ 2,063
2’nd 528-Byte Plane
"B"
512 ~ 1,023
"F"
2,064 ~ 2,079
3’rd 528-Byte Plane
"C"
1,024 ~ 1,535
"G"
2,080 ~ 2,095
4’th 528-Byte Plane
"D"
1,536 ~ 2,047
"H"
2,096 ~ 2,111
Within a block, the pages must be programmed consecutively from the LSB (least significant bit) page of the block to MSB (most sig-
nificant bit) pages of the block. Random page address programming is prohibited.
From the LSB page to MSB page
DATA IN: Data (1)
Data (64)
(1)
(2)
(3)
(32)
(64)
Data register
Page 0
Page 1
Page 2
Page 31
Page 63
Ex.) Random page program (Prohibition)
DATA IN: Data (1)
Data (64)
(2)
(32)
(3)
(1)
(64)
Data register
Page 0
Page 1
Page 2
Page 31
Page 63
Addressing for program operation
:
:
:
:
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K9K8G08U1M | 512M x 8 Bits / 1G x 8 Bits NAND Flash Memory |
| K9F5608Q0C | 512Mb/256Mb 1.8V NAND Flash Errata |
| K9F5608Q0C-D | 512Mb/256Mb 1.8V NAND Flash Errata |
| K9F5608Q0C-H | 512Mb/256Mb 1.8V NAND Flash Errata |
| K9F5608U0C | 512Mb/256Mb 1.8V NAND Flash Errata |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K9F4G08U0M-PCB0 | 制造商:Samsung Semiconductor 功能描述: |
| K9F4G08U0M-PCB0000 | 制造商:Samsung 功能描述:4GB SLC NORMAL X8 TSOP1 - Trays |
| K9F4G08U0M-PCB0T00 | 制造商:Samsung 功能描述:4GB SLC NORMAL X8 TSOP1 - Trays |
| K9F5608D0C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit , 16M x 16 Bit NAND Flash Memory |
| K9F5608D0C-D | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 8 Bit , 16M x 16 Bit NAND Flash Memory |
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