參數(shù)資料
型號： K4J52324KI-HC1A0
元件分類： DRAM
英文描述： 512M X 1 DDR DRAM, 0.2 ns, PBGA136
封裝： HALOGEN FREE AND ROHS COMPLIANT, FBGA-136
文件頁數(shù)： 40/61頁
文件大小： 1364K
代理商： K4J52324KI-HC1A0
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K4J52324KI
datasheet
GDDR3 SGRAM
Rev. 1.2
7.10 GDDR3 tFAW Definition
For eight banks GDDR3 devices, there is a need to limit the number of activates in a rolling window to ensure that the instantaneous current supplying
capability of the devices is not exceeded. To reflect the true capability of the DRAM instantaneous current supply, the same parameter tFAW(four activate
window) as DDR2 is defined.
Eight bank device Sequential Bank Activation Restriction: No more than 4 banks may be activated in a rolling tFAW window. Converting to clocks is done
by dividing tFAW(ns) by tCK(ns) and rounding up to next integer value. As an example of the rolling window, if (tFAW/tCK) rounds up to 10 clocks, and an
activate command is issued in clock N, no more than three further activate commands may be issued in clocks N+1 through N+9.
tRRD
CLK
ACT
tRRD
CMD
tFAW
tFAW + 3*tRRD
ACT
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K4J52324QC 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
K4J52324QC-AC20000 制造商:Samsung Semiconductor 功能描述:GDDR3 SDRAM X32 BOC - Trays
K4J52324QC-BC14 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
K4J52324QC-BC14000 制造商:Samsung Semiconductor 功能描述:GDDR3 SDRAM X32 BOC LEAD PART 10W - Trays
K4J52324QC-BC16 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512Mbit GDDR3 SDRAM
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