參數(shù)資料
型號: ISP1561
廠商: NXP Semiconductors N.V.
英文描述: ISP1561BM
中文描述: ISP1561BM
文件頁數(shù): 22/102頁
文件大?。?/td> 2875K
代理商: ISP1561
Philips Semiconductors
ISP1561
USB PCI host controller
Product data
Rev. 01 — 06 February 2003
22 of 102
9397 750 10015
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
BIST register (address: 0FH):
This register is used for control and status of Built in
Self Test (BIST). Devices that do not support BIST must always return a value of
logic 0 (that is, treat it as a reserved register). A device whose BIST is invoked must
not prevent normal operation of the PCI bus. The BIST register is not used in the
ISP1561. Therefore, the logic value returned is always zero.
Base Address registers:
Power-up software needs to build a consistent address
map before booting the machine to an operating system. This means it has to
determine how much memory is in the system, and how much address space the I/O
controllers in the system require. After determining this information, power-up
software can map the I/O controllers into reasonable locations and proceed with
system boot. To do this mapping in a device independent manner, the base registers
for this mapping are placed in the predefined header portion of Configuration Space.
The bit 0 in all Base Address registers is read-only and used to determine whether
the register maps into Memory or I/O Space. Base Address registers that map to
Memory Space must return logic 0 in bit 0. Base Address registers that map to I/O
Space must return logic 1 in bit 0.
The bit description of the BAR 0 register is given in
Table 17
.
Base Address register 0 (BAR 0) —
(address: 10H)
Base Address register 1, 2, 3, 4, 5 (BAR 1, 2, 3, 4, 5) —
(address: 14H, 18H, 1CH,
20H and 24H): The BAR 1, 2, 3, 4, 5 register spaces are not used in the ISP1561.
CardBus CIS Pointer register (address: 28H):
This four-byte register is used by
devices that want to share silicon between CardBus and PCI. The CardBus CIS
Pointer register is used to point to the Card Information Structure (CIS) for the
CardBus card. This register is not implemented in the ISP1561.
Subsystem Vendor ID register (address: 2CH):
The Subsystem Vendor ID register
is used to uniquely identify the expansion board or subsystem where the PCI device
resides. This register allows expansion board vendors to further distinguish their
boards, even though the boards may have the same Vendor ID and Device ID.
Subsystem Vendor IDs are assigned by PCI-SIG to maintain uniqueness. The bit
description of the Subsystem Vendor ID register is given in
Table 18
.
Table 16:
Bit
7
Header Type register: bit description
Symbol
Description
MFD
Multi-Function Device
: This bit identifies a multi-function device.
If the bit is logic 0, then the device is a single function. If the bit is
logic 1, then the device has multiple functions.
HT[6:0]
Header Type
: These bits identify the layout of the part of the
predefined header beginning at byte 10H in Configuration Space.
6 to 0
Table 17:
Bit
31 to 0
BAR 0 register: bit description
Symbol
Access
BAR 0[31:0]
R/W
Value
0000 0000H
Description
Base Address to Memory-Mapped Host Controller Register
Space
: The memory size required by OHCI and EHCI are 4 K and
256 bytes, respectively. Therefore, BAR 0[31:12] is assigned to the
two OHCI ports, and BAR 0[31:8] is assigned to the EHCI port.
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