參數(shù)資料
型號: ISP1362EE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù): 67/150頁
文件大?。?/td> 647K
代理商: ISP1362EE
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
67 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
14.5 OtgTimer register (R/W: 6AH/EAH)
Code (Hex): 6A
read
Code (Hex): EA
write
Table 30:
Bit
Symbol
OtgTimer register: bit allocation
31
START_
TMR
0
R/W
23
30
29
28
27
26
25
24
reserved
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
-
-
-
-
-
-
-
-
-
-
-
-
-
-
22
21
20
19
18
17
16
TMR_INIT_VALUE[23:16]
0
R/W
12
TMR_INIT_VALUE[15:8]
0
R/W
4
TMR_INIT_VALUE[7:0]
0
R/W
0
0
0
0
0
0
0
R/W
15
R/W
14
R/W
13
R/W
11
R/W
10
R/W
9
R/W
8
0
0
0
0
0
0
0
R/W
7
R/W
6
R/W
5
R/W
3
R/W
2
R/W
1
R/W
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 31:
Bit
31
OtgTimer register: bit description
Symbol
Description
START_
TMR
cause the OTG timer to load TMR_INIT_VALUE into the counter
and start to count. Writing logic 0 will stop the timer. This bit is
automatically cleared when the OTG timer is timed out.
This is the start or stop bit of the OTG timer. Writing logic 1 will
0
stop the timer
1
start the timer
reserved
These bits de
fi
ne the initial value used by the OTG timer. The timer
interval is 0.01 ms. Maximum timer allowed is 167.772 s.
30 to 24
23 to 0
-
TMR_INIT_
VALUE
[23:0]
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