參數(shù)資料
型號(hào)： ISP1362EE
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Single-chip Universal Serial Bus On-The-Go controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝： 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù)： 108/150頁
文件大?。?/td> 647K
代理商： ISP1362EE
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
—
06 January 2004
108 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
15.9.5
HcATLPTDSkipMap register (R/W: 1CH/9CH)
This is a 32-bit register, and the bit description is given in
Table 99
. Bit 0 of the
register represents the
fi
rst PTD stored in the ATL buffer, bit 1 represents the second
PTD stored in the buffer, and so on. When the bit is set by the HCD, the
corresponding PTD is skipped and is not processed by the HC. The HC processes
the skipped PTD only if the HCD has reset its corresponding skipped bit to logic 0.
Clearing the corresponding bit in the HcATLPTDSkipMap register when there is no
valid data in the block will cause unpredictable behavior of the HC.
Code (Hex): 1C
—
read
Code (Hex): 9C
—
write
15.9.6
HcATLLastPTD register (R/W: 1DH/9DH)
This is a 32-bit register.
Table 100
gives the bit description of the register. Bit 0 of the
register represents the
fi
rst PTD stored in the ATL buffer, bit 1 represents the second
PTD stored in the buffer, and so on. The bit that is set to logic 1 by the HCD is used
as an indication to the HC that its corresponding PTD is the last PTD stored in the
ATL buffer. When the processing of the last PTD is complete, the HC loops back to
process the
fi
rst PTD stored in the buffer.
Code (Hex): 1D
—
read
Code (Hex): 9D
—
write
15.9.7
HcATLCurrentActivePTD register (R: 1EH)
This register indicates which PTD stored in the ATL buffer is currently active and is
updated by the HC. The HCD can use it as a buffer pointer to decide which PTD
locations are currently free for
fi
lling in new PTDs to the buffer. This indication helps
to prevent the HCD from accidentally writing into the currently active PTD buffer
location.
Table 101
shows the bit allocation of the register.
Code (Hex): 1E
—
read only
Table 98:
Bit
31 to 0
HcATLPTDDoneMap register: bit description
Symbol
Access Value
PTDDone
Bits[31:0]
Description
0
—
The PTD stored in the ATL buffer was not
successfully processed by the HC.
R
0000H
1
—
The PTD stored in the ATL buffer was
successfully processed by the HC.
Table 99:
Bit
31 to 0 SkipBits
HcATLPTDSkipMap register: bit description
Symbol
Access Value
R/W
0000H
Description
0
—
The HC processes the PTD.
[31:0]
1
—
The HC skips processing the PTD.
Table 100: HcATLLastPTD register: bit description
Bit
Symbol
Access
31 to 0
LastPTD
Bits[31:0]
Value
0000H
Description
0
—
The PTD is not the last PTD stored in the
buffer.
R/W
1
—
The PTD is the last PTD stored in the buffer.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1362EE,518 功能描述:USB 接口集成電路 USB OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362EE,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362EE,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362EE/01 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip Universal Serial Bus On-The-Go controller
ISP1362EE-S 功能描述:IC USB CTRL SNGL CHIP 64TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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