參數(shù)資料
型號(hào)： ISP1362EE
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Single-chip Universal Serial Bus On-The-Go controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝： 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁(yè)數(shù)： 56/150頁(yè)
文件大?。?/td> 647K
代理商： ISP1362EE
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Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
—
06 January 2004
56 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
The DMA subsystem of an IBM-compatible PC is based on the Intel 8237 DMA
controller. It operates as a
‘fl
y-by
’
DMA controller. Data is not stored in the DMA
controller, but it is transferred between an I/O port and a memory address. A typical
example of the DC in 8237 compatible DMA mode is given in
Figure 26
.
The 8237 has two control signals for each DMA channel: DREQ (DMA Request) and
DACK (DMA Acknowledge). General control signals are HRQ (Hold Request) and
HLDA (Hold Acknowledge). The bus operation is controlled by MEMR (Memory
Read), MEMW (Memory Write), IOR (I/O read) and IOW (I/O write).
The following example shows the steps that occur in a typical DMA transfer:
1. The DC receives a data packet in one of its endpoint buffer memory. The packet
must be transferred to memory address 1234H.
2. The DC asserts the DREQ2 signal requesting the 8237 for a DMA transfer.
3. The 8237 asks the CPU to release the bus by asserting the HRQ signal.
4. After completing the current instruction cycle, the CPU places the bus control
signals (MEMR, MEMW, IOR and IOW) and the address lines in three-state and
asserts HLDA to inform the 8237 that it has control of the bus.
5. The 8237 now sets its address lines to 1234H and activates the MEMW and IOR
control signals.
6. The 8237 asserts DACK to inform the DC that it will start a DMA transfer.
7. The DC now places the word to be transferred on the data bus lines because its
RD signal was asserted by the 8237.
8. The 8237 waits one DMA clock period and then deasserts MEMW and IOR. This
latches and stores the word at the desired memory location. It also informs
the DC that the data on the bus lines has been transferred.
9. The DC deasserts the DREQ2 signal to indicate to the 8237 that DMA is no
longer needed. In the
Single cycle mode,
this is done after each byte or word; in
the
Burst mode
, following the last transferred byte or word of the DMA cycle.
10. The 8237 deasserts the DACK output indicating that the DC must stop placing
data on the bus.
Fig 26. DC in 8327 compatible DMA mode.
D0 to D15
CPU
004aaa047
RAM
ISP1362
DMA
CONTROLLER
8237
DREQ
DREQ2
DACK2
HRQ
HLDA
HRQ
HLDA
DACK
IOR
IOW
MEMR
MEMW
RD
WR
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1362EE,518 功能描述:USB 接口集成電路 USB OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362EE,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362EE,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362EE/01 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip Universal Serial Bus On-The-Go controller
ISP1362EE-S 功能描述:IC USB CTRL SNGL CHIP 64TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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