參數(shù)資料
型號: ISP1362EE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù): 114/150頁
文件大?。?/td> 647K
代理商: ISP1362EE
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
114 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
16.1.2
DcAddress register (R/W: B7H/B6H)
This command is used to set the USB assigned address in the DcAddress register
and enable the USB device. The DcAddress register bit allocation is shown in
Table 110
.
A USB bus reset sets the device address to 00H (internally) and enables the device.
The value of the DcAddress register (accessible by the microprocessor) is not altered
by the bus reset. In response to the standard USB request Set Address, the
fi
rmware
must issue a Write Device Address command, followed by sending an empty packet
to the host. The
new
device address is activated when the host acknowledges the
empty packet.
Code (Hex): B6/B7
write or read DcAddress register
Transaction
write or read 1 byte (code or data)
16.1.3
DcMode register (R/W: B9H/B8H)
This command is used to access the DcMode register, which consists of 1 byte (bit
allocation: see
Table 112
). In the 16-bit bus mode, the upper byte is ignored.
The DcMode register controls the DMA bus width, the resume and suspend modes,
interrupt activity, and SoftConnect operation. It can be used to enable the debug
mode, in which all errors and Not Acknowledge (NAK) conditions will generate an
interrupt.
Code (Hex): B8/B9
write or read DcMode register
Transaction
write or read 1 byte (code or data)
[1]
Unchanged by a bus reset.
Table 110: DcAddress register: bit allocation
Bit
7
Symbol
DEVEN
Reset
0
Access
R/W
6
5
4
3
2
1
0
DEVADR[6:0]
0
R/W
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Table 111: DcAddress register: bit description
Bit
Symbol
7
DEVEN
6 to 0
DEVADR[6:0]
Description
Logic 1 enables the device.
This
fi
eld speci
fi
es the USB device address.
Table 112: DcMode register: bit allocation
Bit
7
Symbol
Reset
1
[1]
Access
R/W
6
5
4
3
2
1
0
reserved
GOSUSP
0
R/W
reserved
0
R/W
INTENA
0
[1]
R/W
DBGMOD
0
[1]
R/W
reserved
0
[1]
R/W
SOFTCT
0
[1]
R/W
0
R/W
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