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參數(shù)資料
| 型號： | IS42S16100 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 512K Words x 16 Bits x 2 Banks (16-MBIT)Synchronous DRAM(512K x 16 x 2組同步動態(tài)RAM) |
| 中文描述： | 為512k字× 16位× 2銀行（16兆），同步DRAM（為512k × 16 × 2組同步動態(tài)RAM）的 |
| 文件頁數(shù)： | 35/79頁 |
| 文件大小： | 656K |
| 代理商： | IS42S16100 |
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IS42S16100
ISSI
Integrated Silicon Solution, Inc.
—
1-800-379-4774
Rev. A
09/29/00
35
Burst Data Interruption U/LDQM Pins
(Write Cycle)
Burst data input can be temporarily interrupted (muted )
during a write cycle using the U/LDQM pins. Regardless
of the
CAS
latency, as soon as one of the U/LDQM pins
goes HIGH, the corresponding externally applied input
data will no longer be written to the device internal circuits.
Subsequently, the corresponding input continues to be
muted as long as that U/LDQM pin remains HIGH.
The IS42S16100 will revert to accepting input as soon as
Burst Read and Single Write
The burst read and single write mode is set up using the
mode register set command. During this operation, the
burst read cycle operates normally, but the write cycle
only writes a single data item for each write cycle. The
CAS
latency and DQM latency are the same as in normal
mode.
that pin is dropped to LOW and data will be written to the
device. This input control operates independently on a
byte basis with the UDQM pin controlling upper byte input
(pin I/O8 to I/O15) and the LDQM pin controlling the lower
byte input (pins I/O0 to I/O7).
Since the U/LDQM pins control the device input buffers
only, the cycle continues internally and, inparticular,
incrementing of the internal burst counter continues.
CAS
latency = 2, 3
WRITE A0
COMMAND
I/O
CLK
D
IN
A0
WRITE (CA=A, BANK 0)
CAS
latency = 2, burst length = 4
WRITE A0
COMMAND
UDQM
LDQM
I/O8-I/O15
I/O0-I/O7
CLK
D
IN
A1
WRITE (CA=A, BANK 0)
DATA MASK (LOWER BYTE)
DATA MASK (UPPER BYTE)
t
DMD=0
D
IN
A2
D
IN
A3
D
IN
A0
D
IN
A3
Don't Care
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| IS42S16128 | 128K Words x 16 Bits x 2 Banks (4-Mbit)Synchronous DRAM(128K x 16 x 2組同步動態(tài)RAM) |
| IS42S16128-10T | 128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16128-12T | 128K Words x 16 Bits x 2 Banks (4-MBIT) SYNCHRONOUS DYNAMIC RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S16100_08 | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16100-10T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SDRAM |
| IS42S16100-10TI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16100-5BL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16100-5TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
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