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3
Intel
Pentium
II Processor Mobile Module MMC-1
CONTENTS
1.0
1.1
2.0.
3.0
3.1
3.1.1.
3.1.2.
3.1.3.
3.1.4
3.1.5
3.1.6
3.1.7
3.1.8
3.1.9
3.2.
3.3
4.0.
4.1.
4.2.
4.3.
4.3.1.
4.3.2.
4.3.3.
4.3.4
4.4.
4.4.1
4.4.2.
4.4.3.
4.4.4.
4.4.5.
4.4.6.
4.4.7.
4.4.8.
4.5.
4.6.
4.6.1.
INTRODUCTION ..................................................5
Revision History....................................................5
ARCHITECTURE OVERVIEW ............................5
MODULE CONNECTOR INTERFACE................7
Signal Definition....................................................7
Signal List..............................................................8
Memory (108 Signals) ..........................................9
PCI (56 Signals)..................................................10
Processor and PIIX4E Sideband (9 Signals).....11
Power Management (8 Signals).........................12
Clock (8 Signals).................................................13
Voltages (39 Signals) .........................................14
JTAG (7 Signals) ................................................14
Miscellaneous (45 Signals) ................................15
Connector Pin Assignments...............................16
Pin and Pad Assignments..................................18
FUNCTIONAL DESCRIPTION..........................19
Pentium
II Processor Mobile Module...............19
L2 Cache.............................................................19
The 443BX Host Bridge System Controller .......19
Memory Organization.........................................19
Reset Strap Options ...........................................20
PCI Interface.......................................................20
AGP Feature Set ................................................20
Power Management............................................21
Clock Control Architecture..................................21
Normal State.......................................................23
Auto Halt State....................................................23
Stop Grant State.................................................23
Quick Start State.................................................23
HALT/Grant Snoop State ...................................23
Sleep State..........................................................23
Deep Sleep State................................................24
Typical POS/STR Power....................................24
Electrical Requirement .......................................25
DC Requirements...............................................25
4.6.2
AC Requirements................................................26
4.6.2.1.
System Bus Clock (BCLK) Signal
Quality Specifications and
Measurement Guidelines.....................27
Voltage Regulator ...............................................27
4.7.1.
Voltage Regulator Efficiency ..............................27
4.7.2.
Control of the Voltage Regulator........................28
4.7.2.1.
Voltage Signal Definition and
Sequencing............................................29
4.7.3.
Power Planes: Bulk Capacitance Requirements30
4.7.4.
Surge Current Guidelines...................................31
4.7.4.1.
Slew-Rate Control: Circuit
Description............................................33
4.7.4.2.
Under-Voltage Lockout: Circuit
Description (V_uv_lockout)...................34
4.7.4.3.
Over-Voltage Lockout: Circuit
Description (V_ov_lockout)...................35
4.7.4.4.
Over-Current Protection: Circuit
Description ..........................................................35
4.8.
Active Thermal Feedback...................................35
4.9
Thermal Sensor Configuration Register.............36
5.0.
MECHANICAL SPECIFICATION ......................37
5.1.
Module Dimensions ............................................37
5.1.1.
Board Area..........................................................37
5.1.2.
MMC-1 Pin 1 Location ........................................38
5.1.3.
Printed Circuit Board Thickness.........................38
5.1.4.
Height Restrictions..............................................39
5.2.
Thermal Transfer Plate.......................................40
5.3.
Module Physical Support....................................41
5.3.1
Module Mounting Requirements ........................41
5.3.2.
Module Weight ....................................................41
6.0.
THERMAL SPECIFICATION.............................42
6.1.
Thermal Design Power .......................................42
6.2
Thermal Sensor Setpoint....................................42
7.0.
LABELING INFORMATION...............................43
8.0.
ENVIRONMENTAL STANDARDS ....................45
4.7.