參數(shù)資料
型號(hào)： intel Pentium II processor
廠商： Intel Corp.
英文描述： Pentium II Processor Mobile Module(帶移動(dòng)模塊奔II處理器)
中文描述： 奔騰II處理器的移動(dòng)模塊（帶移動(dòng)模塊奔二處理器）
文件頁(yè)數(shù)： 20/46頁(yè)
文件大?。?/td> 681K
代理商： INTEL PENTIUM II PROCESSOR
20
INTEL
PENTIUM
II PROCESSOR MOBILE MODULE MMC-1
Support for eight banks of memory.
Mixed Mode memory (EDO and SDRAM).
Second set of memory address lines (MAA[13:0]).
Error Correction Code (ECC).
100-MHz SDRAM (and PSB).
Accelerated Graphics Port (AGP).
The 443BX Host Bridge system controller includes EDO and
SDRAM. These memory types should not be mixed in the
system, so that all DRAM in all rows (RAS[5:0]#) must be of
the same technology. The 443BX Host Bridge system
controller targets 60-ns EDO DRAMs and 66-MHz SDRAMs.
The Pentium
II processor mobile module’s clocking
architecture supports the use of SDRAM. Due to the tight
timing requirements of 66-MHz SDRAM clocks, all host and
SDRAM clocks may be generated from the same clocking
architecture on the OEM’s system electronics. For complete
details about using SDRAM memory, and for trace length
guidelines, refer to the Mobile Pentium II processor /
82443BX PCIset Advanced Platform Recommended Design
and Debug Practices.
Refer to the
Intel 440BX PCIset
Datasheet
for details on memory device support,
organization, size, and addressing.
4.3.2.
Reset Strap Options
Several strap options on the memory address bus define the
behavior of the Pentium
II processor mobile module after
reset. Other straps are allowed to override the default
settings. Table 12 shows the various straps and their
implementation.
Table 12. Configuration Straps for the 443BX Host Bridge System Controller
Signal
Function
Module Default Setting
MAB[12]#
Host Frequency
Select
No strap. (66 MHz default).
MAB[11]#
In order queue
depth
No strap. (Maximum Queue Depth is set, i.e. 8).
MAB[10]
Quick Start
Select
Strapped high on the module for Quick Start mode.
MAB[9]#
AGP disable
Strapped to disable AGP.
MAB[7]#
MM Config
Strapped for MMC-1 compatible mode.
MAB[6]#
Host Bus Buffer
Mode Select
Strapped high on the module for mobile FSB buffers.
4.3.3.
PCI Interface
The PCI interface of the 443BX Host Bridge is available at
the MMC-1. The 443BX Host Bridge supports the PCI
Clockrun protocol for PCI bus power management. In this
protocol, PCI devices assert the CLKRUN# open-drain
signal when they require the use of the PCI interface. Refer
to the
PCI Mobile Design Guide
for complete details on the
PCI Clockrun protocol.
The 443BX Host Bridge is responsible for arbitrating the PCI
bus. In MMC-1 mode, the 443BX Host Bridge can only
support up to five PCI bus masters. There are five PCI
Request/Grant pairs, REQ[4:0]# and GNT[4:0]#, available on
the MMC-1.
The 443BX Host Bridge system controller is compliant with
the PCI 2.1 specification, which improves the worst case PCI
bus access latency from earlier PCI specifications. As
detailed in the PCI specification, the 443BX Host Bridge
supports only Mechanism #1 for accessing PCI configuration
space. This implies that signals AD[31:11] are available for
PCI IDSEL signals. However, since the 443BX Host Bridge is
always device #0, AD11 will never be asserted during PCI
configuration cycles as an IDSEL. The 443BX reserves
AD12 for the AGPbus, which is not supported by MMC-1.
Thus, AD13 is the first available address line usable as an
IDSEL. AD18 should be used by the PIIX4E.
4.3.4
AGP Feature Set
The Intel
Pentium
II MMC-1 family does not support the
AGP interface. However, the MMC-2 family supports AGP.
Please refer to the
Pentium II Processor Mobile Module:
Mobile Module Connector 2 (MMC-2) Datasheet.
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