- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377496 > intel Pentium II processor (Intel Corp.) Pentium II Processor Mobile Module(帶移動模塊奔II處理器) PDF資料下載
參數(shù)資料
| 型號： | intel Pentium II processor |
| 廠商： | Intel Corp. |
| 英文描述： | Pentium II Processor Mobile Module(帶移動模塊奔II處理器) |
| 中文描述： | 奔騰II處理器的移動模塊（帶移動模塊奔二處理器） |
| 文件頁數(shù)： | 12/46頁 |
| 文件大?。?/td> | 681K |
| 代理商： | INTEL PENTIUM II PROCESSOR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁當(dāng)前第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
12
INTEL
PENTIUM
II PROCESSOR MOBILE MODULE MMC-1
3.1.5
Power Management (8 Signals)
Table 5 lists the power management interface signals. The
SM_CLK and SM_DATA signals refer to the two-wire serial
SMBus interface. Although this interface is currently used
solely for the digital thermal sensor, the SMBus contains
reserved serial addresses for future use. See section 4.9 for
more details.
Table 5. Power Management Signal Descriptions
Voltage
Name
Type
Description
OEM_PU
I
CMOS
V_3
OEM Pullup:
This pullup resistor is not required on the Intel
Pentium
II processor mobile module. This signal is used by
previous Intel mobile module generations.
L2_ZZ
N/C
CMOS
V_CPUIO
Low-Power Mode For Cache SRAM:
This signal is not used on
the Intel
Pentium
II processor mobile module. It is a signal
used by previous Intel mobile module generations.
SUS_STAT#
I
CMOS
V_3ALWAYS
1
Suspend Status:
This signal connects to the SUS_STAT1#
output of PIIX4E. It provides information on host clock status and
is asserted during all suspend states.
VR_ON
I
V_3S
VR_ON:
Voltage regulator ON.
This 3.3V (5V tolerant) signal
controls the operation of the voltage regulator.
VR_ON should be
generated as a function of the PIIX4E SUSB# signal which is
used for controlling the “Suspend State B” voltage planes. This
signal should be driven by a digital signal with a rise/fall time of
less than or equal to 1 us. (VIL (max)=0.4V, VIH (min)=3.0V).
See Figure 5 for proper sequencing of VR_ON.
VR_PWRGD
O
V_3S
VR_PWRGD:
This signal is driven high to indicate that the
voltage regulator is stable and is pulled low using a 100K resistor
when inactive.
It can be used in some combination to generate
the system PWRGOOD signal.
SM_CLK
I/O D
CMOS
V_3
Serial Clock:
This clock signal is used on the SMBus interface
to the digital thermal sensor. Ensure proper termination based
upon the
System Management Bus Specification, Revision 1.0
.
SM_DATA
I/O D
CMOS
V_3
Serial Data:
Open-drain data signal on the SMBus interface to
the digital thermal sensor. Ensure proper termination based upon
the
System Management Bus Specification, Revision 1.0
.
ATF_INT#
O D
CMOS
V_3
ATF Interrupt:
This signal is an open-drain output signal of the
digital thermal sensor.
NOTE:
V_3ALWAYS: 3.3V supply. It is generated whenever V_DC is available and supplied to PIIX4E resume well.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| INTEL386 CXSA | 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器) |
| INTEL386 CXSB | Low-Voltage, 32-Bit, Fully Static Embedded Microprocessor(低電壓32位完全靜態(tài)嵌入式微處理器) |
| intel386 DX | 32-Bit CHMOS Microprocessor With Integrated Memory Management(32位CHMOS 微處理器帶集成存儲管理) |
| Intel386 EX | Highly Integrated, 32-Bit, Fully Static Embedded Micropocessor(32位高集成完全靜態(tài)嵌入式微處理器) |
| INTEL386 SXSA | 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| INTEN I/O PCB | 制造商:Sliger Designs, Inc. 功能描述:I/O PCB - Bulk |
| INTEN LED PCB | 制造商:Sliger Designs, Inc. 功能描述:LED PCB - Bulk |
| INTEN-1-PROTO | 制造商:Sliger Designs, Inc. 功能描述:QUANTITY TWO PROTO TYPE SHEET METAL - Bulk |
| INTENSI-FI | 制造商:BOARDCOM 制造商全稱:Broadcom Corporation. 功能描述:DRAFT-802.11n PRODUCT FAMILY |
| INTER0.5 | 制造商:POWERDATA TECHNOLOGIES 功能描述:LEAD WIELAND TO WIELAND 0.5M |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。