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參數(shù)資料
| 型號： | IDT88P8344BHI |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 41/98頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SPI3-SPI4 EXCHANGE 820-PBGA |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 系列： | * |
| 其它名稱： | 88P8344BHI |
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IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
Indirect Data
(register 0x33)
(register 0x32)
(register 0x31)
(register 0x30)
bit 31…bit 25
bit 24…bit 16
bit 15…bit 8
bit 7…bit 0
TABLE 18 - BIT ORDER WITHIN A 32-BIT DATA REGISTER
Bit 31 is the most significant data bit.
Indirect Data (register 0x30)
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 2 bit 0
TABLE 19 - BIT ORDER WITHIN AN 8-BIT DATA REGISTER
Bit 7 is the most significant data bit.
9. REGISTER DESCRIPTION
TherearetwodistinctlydifferenttypesofregisteraccessintheIDT88P8344.
Direct access registers are used for interrupts and other high-priority registers
and for access to the indirect access registers. Direct access registers can be
accessed more quickly than indirect access registers, and are used where this
access speed advantage is required. There are only a limited number of direct
accessregistersduetothesixaddresslinesusedontheIDT88P8344.Alldirect
access registers are one byte wide. Most registers within the IDT88P8344 are
oftheindirectaccesstype.Indirectaccessregistersareusedforconfiguration,
maps, etc., that may not need to be accessed as often as the direct registers.
Indirectregistersareaccessedthroughspecialdirectaccessregistersdesigned
forthepurposeofallowingindirectaccesstothelargesetofregistersandmaps
that are needed to configure the IDT88P8344.
9.1 Register access summary
The SPI Exchange device uses an indirect addressing scheme for most of
the configuration registers. The indirect registers are accessed through a
protocol where interface pins A[5:0], D[7:0], and control pins are mapped into
internal register space A[15:0], D[31:0], and Control[7:0]. The full address of
anyindirectlyaddressedregister=Module_base+Block_base+Register_offset.
Direct Register Format
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 2 bit 0
TABLE 17 - BIT ORDER WITHIN AN 8-BIT DATA REGISTER
Bit 7 is the most significant data bit.
Figure 34. Direct & indirect access
Indirect
accessed
space
C[7:0]
8
6
16
32
6370 drw24
Direct
accessed
space
Processor
interf
ace
D[7:0]
A[5:0]
C[7:0]
D[31:0]
A[15:0]
9.1.1 Direct register format
All direct register accesses are one byte. The bit ordering for the direct
access registers is shown.
9.1.2 Indirect register format
The internal format for 32 and 8 bit registers is shown below. The registers
are accessed from the external processor interface as successive bytes of
indirect data. The indirect register space includes 32-bit data registers and 8-
bit data registers. The directly-addressed register space includes directly-
addressable8-bitdataregisters,four8-bitdataregistersforindirectdataaccess,
two8-bitaddressregistersforindirectdataaccess,andan8-bitcontrolregister
for indirect data access.
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