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參數(shù)資料
| 型號： | IDT72281L |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | CMOS SuperSync FIFO |
| 中文描述： | 先進(jìn)先出的CMOS SuperSync |
| 文件頁數(shù)： | 2/26頁 |
| 文件大?。?/td> | 277K |
| 代理商： | IDT72281L |
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COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72281/72291
CMOS SuperSync FIFO 65,536 x 9 and 131,072 x 9
2
TQFP (PN64-1, ORDER CODE: PF)
STQFP (PP64-1, ORDER CODE: TF)
TOP VIEW
DESCRIPTION (CONTINUED)
PIN 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
WEN
SEN
DC
(1)
V
CC
V
CC
GND
(2)
GND
(2)
GND
(2)
GND
(2)
GND
(2)
GND
(2)
GND
(2)
GND
(2)
GND
(2)
D8
D7
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
DNC
(3)
DNC
(3)
GND
DNC
(3)
DNC
(3)
V
CC
DNC
(3)
DNC
(3)
DNC
(3)
GND
DNC
(3)
DNC
(3)
Q8
Q7
Q6
GND
W
P
M
L
F
G
F
/
I
P
H
V
C
P
E
/
O
R
R
R
O
Q
Q
V
C
Q
Q
G
Q
Q
G
D
D
D
D
D
D
D
4675 drw 02
The input port is controlled by a Write Clock (WCLK) input and a Write Enable
(
WEN
) input. Data is written into the FIFO on every rising edge of WCLK when
WEN
is asserted. The output port is controlled by a Read Clock (RCLK) input
and Read Enable (
REN
) input. Data is read fromthe FIFO on every rising edge
of RCLK when
REN
is asserted. An Output Enable (
OE
) input is provided for
three-state control of the outputs.
The frequencies of both the RCLK and the WCLK signals may vary from0
to f
MAX
with complete independence. There are no restrictions on the frequency
of the one clock input with respect to the other.
There are two possible timng modes of operation with these devices: IDT
Standard mode and First Word Fall Through (FWFT) mode.
In
IDT Standard mode,
the first word written to an empty FIFO will not appear
on the data output lines unless a specific read operation is performed. A read
operation, which consists of activating
REN
and enabling a rising RCLK edge,
will shift the word frominternal memory to the data output lines.
In
FWFT mode,
the first word written to an empty FIFO is clocked directly to
the data output lines after three transitions of the RCLK signal. A
REN
does not
have to be asserted for accessing the first word. However, subsequent words
written to the FIFO do require a LOW on
REN
for access. The state of the FWFT/
SI input during Master Reset determnes the timng mode in use.
For applications requiring more data storage capacity than a single FIFO can
provide, the FWFT timng mode permts depth expansion by chaining FIFOs
in series (i.e. the data outputs of one FIFO are connected to the corresponding
data inputs of the next). No external logic is required.
These FIFOs have five flag pins,
EF
/
OR
(Empty Flag or Output Ready),
FF
/
IR
(Full Flag or Input Ready),
HF
(Half-full Flag),
PAE
(Programmable Almost-
Empty flag) and
PAF
(Programmable Almost-Full flag). The
EF
and
FF
functions
are selected in IDT Standard mode. The
IR
and
OR
functions are selected in
NOTES:
1. DC = Dont Care. Must be tied to GND or V
CC
, cannot be left open.
2. This pin may either be tied to GND or left open.
3. DNC = Do Not Connect.
PIN CONFIGURATIONS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT72281L10PF | CMOS SuperSync FIFO |
| IDT72281L10PFI | CMOS SuperSync FIFO |
| IDT72281L10TF | CMOS SuperSync FIFO |
| IDT723612L15PF | BiCMOS SyncBiFIFOO 64 x 36 x 2 |
| IDT723612L15PQF | BiCMOS SyncBiFIFOO 64 x 36 x 2 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT72281L10PF | 功能描述:IC FIFO 32768X18 LP 10NS 64QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256（64 x 4） 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
| IDT72281L10PF8 | 功能描述:IC FIFO 32768X18 LP 10NS 64QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256（64 x 4） 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
| IDT72281L10PFG | 制造商:Integrated Device Technology Inc 功能描述:IC FIFO 32768X18 LP 10NS 64QFP |
| IDT72281L10PFG8 | 制造商:Integrated Device Technology Inc 功能描述:IC FIFO 32768X18 LP 10NS 64QFP |
| IDT72281L10TF | 功能描述:IC FIFO 32768X18 LP 10NS 64QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256（64 x 4） 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
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