- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10742 > ICS1893AFLF (IDT, Integrated Device Technology Inc)PHYCEIVER LOW PWR 3.3V 48-SSOP PDF資料下載
參數(shù)資料
| 型號： | ICS1893AFLF |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 85/136頁 |
| 文件大?。?/td> | 0K |
| 描述： | PHYCEIVER LOW PWR 3.3V 48-SSOP |
| 標準包裝： | 30 |
| 系列： | PHYceiver™ |
| 類型： | PHY 收發(fā)器 |
| 規(guī)程： | MII |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-BSSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-SSOP |
| 包裝： | 管件 |
| 其它名稱： | 1893AFLF 800-2353-5 ICS1893AFLF-ND |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁當前第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁
ICS1893AF, Rev D 10/26/04
October, 2004
52
Chapter 7
Functional Blocks
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
7.6
Functional Block: Management Interface
As part of the MAC/Repeater Interface, the ICS1893AF provides a two-wire serial management interface
which complies with the ISO/IEC 8802-3 standard MII Serial Management Interface. This interface is used
to exchange control, status, and configuration information between a Station Management entity (STA) and
the physical layer device (PHY). The PHY and STA exchange this data through a pre-defined set of
management registers. The ISO/IEC standard specifies the following components of this serial
management interface:
A set of registers (Section 7.6.1, “Management Register Set Summary”)
The frame structure (Section 7.6.2, “Management Frame Structure”)
The protocol
In compliance with the ISO/IEC specification, the ICS1893AF implementation of the serial management
interface provides a bi-directional data pin (MDIO) along with a clock (MDC) for synchronizing the
exchange of data. These pins remain active in all ICS1893AF MAC/Repeater Interface modes (that is, the
10/100 MII, 100M Symbol, and 10M Serial interface modes).
7.6.1
Management Register Set Summary
The ICS1893AF implements a Management Register set that adheres to the ISO/IEC standard. This
register set (discussed in detail in Chapter 8, “Management Register Set”) includes the mandatory ‘Basic’
Control and Status registers and the ISO/IEC ‘Extended’ registers as well as some ICS-specific registers.
7.6.2
Management Frame Structure
The Serial Management Interface is a synchronous, bi-directional, two-wire, serial interface for the
exchange of configuration, control, and status data between a PHY, such as an ICS1893AF, and an STA.
All data transferred on an MDIO signal is synchronized by its MDC signal. The PHY and STA exchange
data through a pre-defined register set.
The ICS1893AF complies with the ISO/IEC defined Management Frame Structure and protocol. This
structure supports both read and write operations. Table 7-2 summarizes the Management Frame
Structure.
Note:
The Management Frame Structure starts from and returns to an IDLE condition. However, the IDLE
periods are not part of the Management Frame Structure.
Table 7-2.
Management Frame Structure Summary
Frame Field
Data
Comment
Acronym
Frame Function
PRE
Preamble (Bit 1.6)
11..11
32 ones
SFD
Start of Frame
01
2 bits
OP
Operation Code
10/01 (read/write)
2 bits
PHYAD
PHY Address (Bits 16.10:6)
AAAAA
5 bits
REGAD
Register Address
RRRRR
5 bits
TA
Turnaround
Z0/10 (read/write)
2 bits
DATA
Data
DDD..DD
16 bits
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-JNN-MY-F2 | CONVERTER MOD DC/DC 18.5V 50W |
| ADCMP606BKSZ-R2 | IC COMP TTL/CMOS 1CHAN SC70-6 |
| VE-JNM-MY-F4 | CONVERTER MOD DC/DC 10V 50W |
| MAX976EUA+ | IC COMPARATOR DUAL 8-UMAX |
| ISL98003INZ-110 | IC AFE 3CH 8BIT 110MHZ 80EPTQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1893AFLFT | 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| ICS1893AFT | 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:PHYceiver™ 標準包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| ICS1893AG | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| ICS1893AGI | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| ICS1893AGILF | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。