參數(shù)資料
型號(hào): HC05JJ6GRS
英文描述: 68HC05JJ6 and 68HC05JP6 General Release Specification
中文描述: 68HC05JJ6和68HC05JP6總發(fā)行規(guī)格
文件頁數(shù): 50/106頁
文件大?。?/td> 1366K
代理商: HC05JJ6GRS
GENERAL RELEASE SPECIFICATION
July 16, 1999
MOTOROLA
7-6
INPUT/OUTPUT PORTS
For More Information On This Product,
Go to: www.freescale.com
MC68HC05J5A
REV 2.1
I/O pin is activated only if the I/O pin is programmed as an input whereas a pullup
device on an I/O pin is always activated whenever enabled, regardless of port
direction.
The PDURB is a write-only register. Any reads of location $0011 will return unde-
fined results. Since reset clears both the DDRB and the PDURB, all pins will ini-
tialize as inputs with the pulldown devices active and pullup devices active (if
chosen via mask option).
Typical value of port B pullup is 30K
.
7.4
I/O PORT PROGRAMMING
All I/O pins can be programmed as inputs or outputs, with or without pulldown/up
devices.
7.4.1 Pin Data Direction
The direction of a pin is determined by the state of its corresponding bit in the
associated port Data Direction Register (DDR). A pin is configured as an output if
its corresponding DDR bit is set to a logic one. A pin is configured as an input if its
corresponding DDR bit is cleared to a logic zero.
The data direction bits DDRB0-DDRB5 and DDRA0-DDRA7 are read/write bits
which can be manipulated with read-modify-write instructions. At power-on or
reset, all DDRs are cleared which configures all port pins as inputs. If the pull-
down/up mask option is chosen, all pins will initially power-up with their software
programmable pulldowns/ups enabled.
7.4.2 Output Pin
When an I/O pin is programmed as an output pin, the state of the corresponding
data register bit will determine the state of the pin. The state of the data register
bits can be altered by writing to address $0000 for Port A and address $0001 for
Port B. Reads of the corresponding data register bit at address $0000 or $0001
will return the state of the data register bit (not the state of the I/O pin itself).
Therefore bit manipulation is possible on all pins programmed as outputs.
If the corresponding bit in the pulldown/up register is clear (and the pulldown/up
mask option is chosen), only output pins with pullups have an activated pullup
device connected to the pin. For those pins with pulldowns and configured as out-
put pins, the pulldowns will be inactivated regardless of the state of the corre-
sponding pulldown/up register bit. Since the pulldown/up register bits are write-
only, bit manipulation should not be used on these register bits.
7.4.3 Input Pin
When an I/O pin is programmed as an input pin, the state of the pin can be deter-
mined by reading the corresponding data register bit. Any writes to the corre-
sponding data register bit for an input pin will be ignored in the sense that the
written value will not be reflected on the pin, rather it is only reflected in the port
data register. Please refer to
Table 7-1
and
Table 7-2
for details.
F
Freescale Semiconductor, Inc.
n
.
相關(guān)PDF資料
PDF描述
HC05K3GRS 68HC05K3 General Release Specification
HC05PL4GRS 68HC05PL4A. 68HC05PL4B. 68HC705PL4B General Release Specification
HC05V7GRS 68HC05V7 General Release Specification
HC05 Bipolar Transistor; Transistor Polarity:Dual P Channel; Power Dissipation:20W; DC Current Gain Min (hfe):25; Collector Current:1A; DC Current Gain Max (hfe):200; Power (Ptot):20W
HC1-5502A-7 Subscriber Line Interface Circuit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HC05K3GRS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:68HC05K3 General Release Specification
HC05PL4GRS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:68HC05PL4A. 68HC05PL4B. 68HC705PL4B General Release Specification
HC05V7GRS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:68HC05V7 General Release Specification
HC060WE1DS038B 制造商:TE Connectivity 功能描述:EC7174-000
HC060YW1DS038B 制造商:TE Connectivity 功能描述:EC7207-000