參數(shù)資料
型號： HC05JJ6GRS
英文描述： 68HC05JJ6 and 68HC05JP6 General Release Specification
中文描述： 68HC05JJ6和68HC05JP6總發(fā)行規(guī)格
文件頁數(shù)： 35/106頁
文件大小： 1366K
代理商： HC05JJ6GRS
July 16, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05J5A
REV 2.1
RESETS
MOTOROLA
5-1
SECTION 5
RESETS
The MCU can be reset from five sources: one external input and four internal
restart conditions.
Initial power up of device (power on reset)
A logic zero applied to the RESET pin (external reset)
Timeout of the COP watchdog (COP reset)
Low voltage applied to the device (LVR reset)
Fetch of an opcode from an address not in the memory map (illegal
address reset)
Figure 5-1
shows a block diagram of the reset sources and their interaction.
Figure 5-1. Reset Block Diagram
Illegal Address
(ILADR)
CPU
LATCH
RESET
COP Watchdog
(COPR)
RST
OSC
Data
Address
Address
PH2
To other
peripherals
S
IRQ
Mode
Select
To Interrupt
logic
LATCH
R
Power-On Reset
(POR)
V
DD
Low Voltage Reset
(LVR)
V
DD
R
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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